FX29

Compact Compression Load Cell

DOC CONTROL NUMBER 05142019

10/2020

Page 9

Parameter

Symbol

Min

Typ

Max

Units

Notes/Conditions

SCLK clock frequency

FSCL

100

400

kHz

Start condition hold time relative to

SCL edge

0.1

µS

0.6

µS

0.6

µS

Start condition startup time relative to

SCL edge

0.1

µS

Data hold time on SDA relative to SCL

edge

0

µS

Data setup time on SDA relative to

SCL edge

0.1

µS

Stop condition setup time on SCL

0.1

µS

Bus free time between stop and start

condition

2

µS

Digital Input and Output Parameters

(Unless otherwise specified, all parameters are measured at 25°C @ 3.0V applied)

Parameter

Symbol

Min

Typ

Max

Units

Notes/Conditions

Input high voltage

0.8

1.0

x Vdd

Input low voltage

0.0V

0.2

x Vdd

Output low level

x Vdd

Load capacitance @ SDA

200

pF

@400 kHz

Input capacitance (each pin)

10

pF