| Electronic Components Datasheet Search |
|
56F8347 Datasheet(PDF) 101 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
56F8347 Datasheet(HTML) 101 Page - Freescale Semiconductor, Inc |
|
101 / 176 page ![]() Register Descriptions 56F8347 Technical Data, Rev. 3.0 Freescale Semiconductor 101 Preliminary 5.6.15.1 Reserved—Bits 15–7 This bit field is reserved or not implemented. It is read as 0, but cannot be modified by writing. 5.6.15.2 Fast Interrupt 1 Vector Number (FAST INTERRUPT 1)—Bits 6–0 This value determines which IRQ will be a Fast Interrupt 1. Fast interrupts vector directly to a service routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table first; see Part 5.3.3. IRQs used as fast interrupts must be set to priority level 2. Unexpected results will occur if a fast interrupt vector is set to any other priority. Fast interrupts automatically become the highest-priority level 2 interrupt, regardless of their location in the interrupt table, prior to being declared as fast interrupt. Fast Interrupt 0 has priority over Fast Interrupt 1. To determine the vector number of each IRQ, refer to Table 4-5. 5.6.16 Fast Interrupt 1 Vector Address Low Register (FIVAL1) Figure 5-18 Fast Interrupt 1 Vector Address Low Register (FIVAL1) 5.6.16.1 Fast Interrupt 1 Vector Address Low (FIVAL1)—Bits 15–0 The lower 16 bits of vector address are used for Fast Interrupt 1. This register is combined with FIVAH1 to form the 21-bit vector address for Fast Interrupt 1 defined in the FIM1 register. 5.6.17 Fast Interrupt 1 Vector Address High Register (FIVAH1) Figure 5-19 Fast Interrupt 1 Vector Address High Register (FIVAH1) 5.6.17.1 Reserved—Bits 15–5 This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing. 5.6.17.2 Fast Interrupt 1 Vector Address High (FIVAH1)—Bits 4–0 The upper five bits of the vector address are used for Fast Interrupt 1. This register is combined with FIVAL1 to form the 21-bit vector address for Fast Interrupt 1 defined in the FIM1 register. Base + $F 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read FAST INTERRUPT 1 VECTOR ADDRESS LOW Write RESET 00000000 00000000 Base + $10 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read 0 0 0 0 0 0 0 0 0 0 0 FAST INTERRUPT 1 VECTOR ADDRESS HIGH Write RESET 00000000 00000000 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |