INA239 datasheet(34/47 Pages) TI

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In applications that do not have large energy storage, electrolytic capacitors on one or both sides of the shunt,

an input overstress condition may result from an excessive dV/dt of the voltage applied to the input. A hard

physical short is the most likely cause of this event. This problem occurs because an excessive dV/dt can

activate the ESD protection in the device in systems where large currents are available. Testing demonstrates

that the addition of 10-Ω resistors in series with each input of the device sufficiently protects the inputs against

this dV/dt failure up to the 40-V maximum differential voltage rating of the device. Selecting these resistors in the

range noted has minimal effect on accuracy.

<100

IN+

IN-

VBUS

GND

100 nF

VS = 2.7V± 5.5V

Load

Supply

CFILTER

0.1µF to 1µF

RFILTER

RDIFF

RSHUNT

Figure 8-1. Input Filtering

Do not use values greater than 100 ohms for RFILTER. Doing so will degrade gain error and increase non-

linearity.

8.2 Typical Application

The low offset voltage and low input bias current of the INA239-Q1 allow accurate monitoring of a wide range

of currents. To accurately monitor currents with high resolution, select the value of the shunt resistor so that the

resulting sense voltage is close to the maximum allowable differential input voltage range (either ±163.84 mV

or ±40.96 mV, depending on register settings). The circuit for monitoring currents in a high-side configuration is

shown in Figure 8-2.

IN+

IN-

VBUS

SCLK

MOSI

MISO

ALERT

GND

SHUNT

48 V

BATT

GND

10 k

100 nF

SPI

I/F

LOAD

CHARGER

S = 2.7 V to 5.5 V

MCU

Figure 8-2. INA239-Q1 High-Side Sensing Application Diagram

8.2.1 Design Requirements

The INA239-Q1 measures the voltage developed across a current-sensing resistor (RSHUNT) when current

passes through it. The device also measures the bus supply voltage and calculates power when calibrated. It

also comes with alert capability, where the alert pin can be programmed to respond to a user-defined event or a

conversion ready notification.

The design requirements for the circuit shown in Figure 8-2 are listed in Table 8-3.

INA239-Q1

SLYS028A – MAY 2020 – REVISED JUNE 2021

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