MP8799 datasheet(11/20 Pages) EXAR

11 / 20 page

MP8799

Rev. 3.00

APPLICATION NOTES

Figure 14. Typical Circuit Connections

OFW

CLK

DB9 - DB0

AGND

DGND

(Substrate)

MP8799

AIN1

VREF(+)

VREF(–)

3/4 R

1/4 R

Buffer

AVDD

DVDD

C1D, C2D

C1A, C2A

C1 = 4.7 or 10µF Tantalum

C2 = 0.1µF Chip Cap or low inductance cap

RT = Clock Transmission Line Termination

Reference

Voltage

Source

VREF1(–)

AIN

–

+5 V

1 of 8

AIN8

100W

Resistive

Isolation of

50 to 100

CLK

The following information will be useful in maximizing the per-

formance of the MP8799.

1. All signals should not exceed AVDD +0.5 V or AGND –0.5 V

or DVDD +0.5 V or DGND –0.5 V.

2. Any input pin which can see a value outside the absolute

maximum ratings (AVDD or DVDD+0.5 V or AGND –0.5 V)

should be protected by diode clamps (HP5082-2835) from

input pin to the supplies. All MP8799 inputs have input pro-

tection diodes which will protect the device from short tran-

sients outside the supply ranges.

3. The design of a PC board will affect the accuracy of MP8799.

Use of wire wrap is not recommended.

4. The analog input signal (VIN) is quite sensitive and should be

properly routed and terminated. It should be shielded from

the clock and digital outputs so as to minimize cross coupling

and noise pickup.

5. The analog input should be driven by a low impedance (less

than 50

Ω).

6. Analog and digital ground planes should be substantial and

common at one point only. The ground plane should act as a

shield for parasitics and not a return path for signals. To re-

duce noise levels, use separate low impedance ground

paths.

DGND should not be shared with other digital cir-

cuitry. If separate low impedance paths cannot be provided,

DGND should be connected to AGND next to the MP8799.

DVDD should not be shared with other digital circuitry to

avoid conversion errors caused by digital supply transients.

DVDD for the MP8799 should be connected to AVDD next to

the MP8799.

8. DVDD and AVDD are connected inside the MP8799 through

the N – doped silicon substrate. Any DC voltage difference

between DVDD and AVDD will cause undesirable internal

currents.

9. Each power supply and reference voltage pin should be

decoupled with a ceramic (0.1

µF) and a tantalum (10µF) ca-

pacitor as close to the device as possible.

10. The digital output should not drive long wires. The capacitive

coupling and reflection will contribute noise to the conver-

sion. When driving distant loads, buffers should be used.

100

Ω resistors in series with the digital outputs in some ap-

plications reduces the digital output disruption of AIN.

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