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MICRF620TR Datasheet(PDF) 14 Page - Micrel Semiconductor |
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MICRF620TR Datasheet(HTML) 14 Page - Micrel Semiconductor |
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14 / 18 page ![]() Micrel, Inc. MICRF620 December 2005 14 M9999-120205 Front End A6..A0 D7 D6 D5 D4 D3 D2 D1 D0 0000000 LNA_by PA2 PA1 PA0 Sync_en Mode1 Mode0 ’1’ A low noise amplifier in RF receivers is used to boost the incoming signal prior to the frequency conversion process. This is important in order to prevent mixer noise from dominating the overall front-end noise performance. The LNA is a two-stage amplifier and has a nominal gain of approximately 23dB at 434MHz. The front end has a gain of about 33dB to 35dB. The gain varies by 1-1.5dB over a 2.0V to 2.5V variation in power supply. The LNA can be bypassed by setting bit LNA_by to ‘1’. This can be useful for very strong input signal levels. The front-end gain with the LNA bypassed is about 9-10dB. The mixers have a gain of about 10dB at 434MHz. Sallen-Key Filters A6..A0 D7 D6 D5 D4 D3 D2 D1 D0 0000001 ‘1’ ‘0’ ‘0’ ‘0’ RSSI_en LD_en PF_FC1 PF_FC0 Each channel includes a pre-amplifier and a prefilter, which is a three-pole Sallen-Key lowpass filter. It protects the following switched-capacitor filter from strong adjacent channel signals, and it also works as an anti-aliasing filter. The preamplifier has a gain of 22.23dB. The maximum output voltage swing is about 1.4Vpp for a 2.25V power supply. In addition, the IF amplifier also performs offset cancellation. Gain varies by less than 0.5dB over a 2.0 – 2.5V variation in power supply. The third order Sallen-Key lowpass filter is programmable to four different cut-off frequencies according to the table below: PF_FC1 PF_FC0 Cut-off Freq. (kHz) 0 0 100 0 1 150 1 0 230 1 1 340 Switched Capacitor Filter A6..A0 D7 D6 D5 D4 D3 D2 D1 D0 0001000 ‘1’ ‘1’ ScClk5 ScClk4 ScClk3 ScClk2 ScClk1 ScClk0 The main channel filter is a switched-capacitor implementation of a six-pole elliptic low pass filter. The elliptic filter minimized the total capacitance required for a given selectivity and dynamic range. The cut-off frequency of the switched-capacitor filter is adjustable by changing the clock frequency. The clock frequency is designed to be 20 times the cut-off frequency. The clock frequency is derived from the reference crystal oscillator. A programmable 6-bit divider divides the frequency of the crystal oscillator. The cut-off frequency of the filter is given by: ScClk 40 f f XCO CUT ⋅ = fCUT: Filter cutoff frequency fXCO: Crystal oscillator frequency ScCLK: Switched capacitor filter clock, bits ScClk5-0 1 st order RC lowpass filters are connected to the output of the SC filter to filter the clock frequency. The lowest cutoff frequency in the pre- and the main channel filter must be set so that the received signal is passed with no attenuation, that is frequency deviation plus modulation. If there are any frequency offset between the transmitter and the receiver, this must also be taken into consideration. A formula for the receiver bandwidth can be summarized as follows: 2 / Baudrate f f f DEV OFFSET BW + + + = where fBW: Needed receiver bandwidth, fcut above should not be smaller than fBW (Hz) foffset: Total frequency offset between receiver and transmitter (Hz) fDEV: Single-sided frequency deviation Baudrate: The baud rate given is bit/sec RSSI A6..A0 D7 D6 D5 D4 D3 D2 D1 D0 0000001 ‘1’ ‘0’ ‘0’ ‘0’ RSSI_en LD_en PF_FC1 PF_FC0 0 0,5 1 1,5 2 2,5 -110 -100 -90 -80 -70 -60 -50 -40 Pin Pin (dBm) (dBm) RSSI Figure 9. RSSI Voltage A Typical plot of the RSSI voltage as function of input power is shown in Figure 9. The RSSI has a dynamic range of about 50dB from about -110dBm to -60dBm input power. The RSSI can be used as a signal presence indicator. When a RF signal is received, the RSSI output increases. This could be used to wake up circuitry that is normally in a sleep mode configuration to conserve battery life. |
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