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VSP2265GSJR Datasheet(PDF) 63 Page - Texas Instruments |
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VSP2265GSJR Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 88 page ![]() Timing Specification 60 SLES056—December 2002 VSP2265 4.19 Vertical Rate Timing (for 2A CCD) [ ×2 monitor mode—e-zoom function] CH1, 3 SUB H1 H2 STO CH2, 4 † Internal Use ‡ External Input ΦV1 ΦV2 ΦV3 ΦV4 High-Speed Transfer 640 Lines, 187 kHz High-Speed Transfer EZ ≤640 Lines, 187 kHz NOTE: After readout, number (EZ) of lines high-speed transfer and CCD output line address, (If EZ/2 = even, Z = EZ/4–1) ×8+3. If EZ/2=odd, Z = (EZ–2)2) HD} VD} PBLK{ CPOB{ Data Latch{ CLPD{ CCD_OUT} |
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