ICS95V842 datasheet(1/9 Pages) ICST

Part #	ICS95V842

Description	DDR Phase Lock Loop Clock Driver (60MHz - 220MHz)

PDF	9 Pages

Scroll/Zoom	100%

Manufacturer	ICST [Integrated Circuit Systems]

Direct Link	http://www.icst.com

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1 / 9 page

Integrated

Circuit

Systems, Inc.

ICS95V842

0830A—09/10/04

Block Diagram

DDR Phase Lock Loop Clock Driver (60MHz - 220MHz)

Pin Configuration

Recommended Application:

1:2 DDRI Clock Driver

Product Description/Features:

•

Low skew, low jitter PLL clock driver

•

Feedback pins for input to output synchronization

•

Spread Spectrum tolerant inputs

•

With bypass mode mux

•

Operating frequency 60 to 220 MHz

Switching Characteristics:

•

CYCLE - CYCLE jitter: <75ps

•

OUTPUT - OUTPUT skew: <60ps

•

Period jitter: ±75ps

•

Half-Period jitter: ±75ps

Functionality

S

T

U

P

N

IS

T

U

P

T

U

O

e

t

a

t

S

L

P

D

V

AT

N

I

_

K

L

CC

N

I

_

K

L

CT

K

L

CC

K

L

CT

T

U

O

_

B

FC

T

U

O

_

B

F

D

N

GL

H

L

H

L

H

f

O

/

d

e

s

a

p

y

B

D

N

GH

L

H

L

H

L

f

O

/

d

e

s

a

p

y

B

V

5

.

2

)

m

o

n

(

LH

L

H

L

H

n

O

V

5

.

2

)

m

o

n

(

HL

H

L

H

L

n

O

VDD2.5 1

16 GND

DDRT0 2

15 DDRC1

DDRC0 3

14 DDRT1

GND 4

13 VDD2.5

CLK_INT 5

12 FB_INC

CLK_INC 6

11 FB_INT

AVDD 7

10 FB_OUTT

AGND 8

9 FB_OUTC

16 pin SSOP

PLL

FB_INT

FB_INC

CLK_INC

CLK_INT

FB_OUTT

FB_OUTC

DDRT (1:0)

DDRC(1:0)

AVDD

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