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AN5095 Datasheet(PDF) 13 Page - Panasonic Semiconductor |
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AN5095 Datasheet(HTML) 13 Page - Panasonic Semiconductor |
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13 / 36 page ![]() 13 ICs for TV AN5095K s Electrical Characteristics at Ta = 25°C (continued) • Design reference data (continued) Note) The characteristics listed below are theoretical values based on the IC design and are not guaranteed. Parameter Symbol Conditions Min Typ Max Unit Color signal processing circuit Burst 150 mV[p-p] (PAL), reference is B-out Demodulation output residual carrier VCAR1 2fSC level of pin 60 and pin 61 30 mV Color-difference output residual VCAR2 2fSC level of pin 15, pin 16 and pin 17 50 mV carrier VCO free-running frequency (PAL) fCP Difference from f = 4.433619 MHz −300 300 Hz VCO free-running frequency (NTSC) fCN Difference from f = 3.579545 MHz −300 300 Hz fCO fluctuation with VCC ∆f C /VCC VCC1 = 9 V (allowance: ±10%), −300 300 Hz VCC3 = 5 V (allowance: ±10%) Static phase error (PAL) ∆θ P Tint gap at ∆f C = −300 Hz to +300 Hz 5 deg/ change 100 Hz Static phase error (NTSC) ∆θ N Tint gap at ∆f C = −300 Hz to +300 Hz 5 deg/ change 100 Hz PAL/NTSC ratio RP/N Output amplitude ratio between PAL 0.7 1.0 1.3 Time and NTSC Line crawling ∆V PAL Pin 61: Output amplitude difference 50 mV per 1H at -(R-Y) terminal Color-difference output bandwidth fCC Band to become −3 dB 1.0 MHz Color-difference output fluctuation ∆V C/V VCC1 = 9 V (allowance: ±10%), ±15 % with VCC VCC3 = 5 V (allowance: ±10%) Color-difference output - ∆V C/T Ta = −20°C to 70°C ±15 % temperature characteristics PAL/NTSC output impedance RO60,61PN DC measurement 400 510 620 Ω SECAM output impedance RO60,61S DC measurement 100 k Ω Color, black & white DC ∆V CBW Pedestal voltage difference between − 60 0 60 mV difference voltage with and without burst signal (C-Y)/Y ratio *7 RC/Y Color bar input, B-out contrast typ. 0.9 1.2 1.5 V[0-p]/ color data 00 = 30 V[0-p] RGB processing circuit YS change-over speed fYS fYS , when YS input is 3 V[0-p] and 7 MHz output level is −3 dB Outside R, G, B input dynamic VDEXT Contrast max. data 03 = 3F 1.0 V[p-p] range Inside and outside crosstalk CTRGB Leakage at f = 1 MHz, 1 V[p-p], −50 dB YS = 5 V Synchronizing signal processing circuit Lock detection output voltage VLD V18 at horizontal AFC lock 5.7 6.3 6.9 V Lock detection charge and ILD DC measurement ±0.6 ±0.8 ±1.1 mA discharge current Note) *1 to *9: Refer to "Explanation of test methods". |
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