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PL623-38 Datasheet(PDF) 4 Page - PhaseLink Corporation |
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PL623-38 Datasheet(HTML) 4 Page - PhaseLink Corporation |
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4 / 6 page ![]() Preliminary PL623-38 Low Phase Noise XO (for 3rd O.T.) For 65-130MHz 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 05/03/05 Page 4 2. Crystal Specifications 3. General Electrical Specifications PARAMETERS SYMBO L CONDITIONS MIN. TYP. MAX. UNITS Supply Current (Loaded Outputs) IDD PECL 85/55 mA Operating Voltage VDD 2.25 3.63 V Output Clock Duty Cycle @ Vdd – 1.3V (PECL) 45 50 55 % Short Circuit Current ±50 mA 4. Jitter Specifications PARAMETERS CONDITIONS MIN. TYP. MAX. UNITS Period jitter RMS at 106.25MHz 2.0 Period jitter peak-to-peak at 106.25MHz With capacitive decoupling between VDD and GND. 17.0 ps Integrated jitter RMS at 106.25MHz Integrated 12 kHz to 20 MHz 0.3* ps *Measured on Agilent E5500. 5. Phase Noise Specifications PARAMETERS FREQUENCY @10Hz @100Hz @1kHz @10kHz @100kHz UNITS Phase Noise vs. carrier with fund. crystal. 106.25MHz -55 -90 -110 -135 -145 dBc/Hz *: Note: Phase noise to be measured. Based on P520-20 product (fundamental 155MHz VCXO). Name Symbol Conditions Min. Max. Units Parallel Resonant mode 3rd Overtone N/A Load capacitance (capacitance on built-in on die seen by crystal) CL Die only, no bond wire, no package 5 pF Inter-electrode capacitance C0 4 pF Equivalent Series Resistance ESR 35 Ω Oscillation Frequency 3rd Overtone 65 130 MHz |
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