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AT25PE40 Datasheet(PDF) 3 Page - Dialog Semiconductor

Part # AT25PE40
Description  4-Mbit DataFlash-L Page Erase Serial Flash Memory
PDF  63 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

AT25PE40 Datasheet(HTML) 3 Page - Dialog Semiconductor

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AT25PE40
DS-25PE40-142C–8/2018
Description
The AT25PE40 is a 1.65V minimum, serial-interface sequential access Flash memory ideally suited for a wide variety of
digital voice, image, program code, and data storage applications. The AT25PE40 also supports the RapidS serial
interface for applications requiring very high speed operation. Its 4,194,304 bits of memory are organized as 2,048 pages
of 256 bytes or 264 bytes each. In addition to the main memory, the AT25PE40 also contains two SRAM buffers of
256/264 bytes each. The buffers allow receiving of data while a page in the main memory is being reprogrammed.
Interleaving between both buffers can dramatically increase a system's ability to write a continuous data stream. In
addition, the SRAM buffers can be used as additional system scratch pad memory, and E2PROM emulation (bit or byte
alterability) can be easily handled with a self-contained three step read-modify-write operation.
Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the
DataFlash-L® uses a serial interface to sequentially access its data. The simple sequential access dramatically reduces
active pin count, facilitates simplified hardware layout, increases system reliability, minimizes switching noise, and
reduces package size. The device is optimized for use in many commercial and industrial applications where
high-density, low-pin count, low-voltage, and low-power are essential.
To allow for simple in-system re-programmability, the AT25PE40 does not require high input voltages for programming.
The device operates from a single 1.65V to 3.6V power supply for the erase and program and read operations. The
AT25PE40 is enabled through the Chip Select pin (CS) and accessed via a 3-wire interface consisting of the Serial Input
(SI), Serial Output (SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.
1.
Pin Configurations and Pinouts
Figure 1-1.
Pinouts
Note:
1.
The metal pad on the bottom of the UDFN package is not internally connected to a voltage potential.
This pad can be a “no connect” or connected to GND.
1
2
3
4
8
7
6
5
CS
SO
WP
GND
Vcc
RESET
SCK
SI
8-lead SOIC
Top View
CS
SO
WP
GND
Vcc
RESET
SCK
SI
8
7
6
5
1
2
3
4
8-pad UDFN
Top View
(through package)



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