| Electronic Components Datasheet Search |
|
LM2695 Datasheet(PDF) 12 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
LM2695 Datasheet(HTML) 12 Page - National Semiconductor (TI) |
|
12 / 14 page ![]() Applications Information (Continued) At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower peak of the inductor’s ripple current, ramps up to the peak value, then drop to zero at turn-off. The average current during the on-time is the load current. For a worst case calculation, C1 must supply this average load current during the maximum on-time. C1 is calculated from: where Io is the load current, t ON is the maximum on-time, and ∆V is the allowable ripple voltage at V IN. C5’s purpose is to help avoid transients and ringing due to long lead induc- tance at V IN. A low ESR, 0.1 µF ceramic chip capacitor is recommended, located close to the LM2695 . C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended as C4 supplies a surge current to charge the buck switch gate at turn-on. A low ESR also helps ensure a complete recharge during each off-time. C6: The capacitor at the SS pin determines the softstart time, i.e. the time for the reference voltage at the regulation comparator, and the output voltage, to reach their final value. The time is determined from the following: PC BOARD LAYOUT The LM2695 regulation, over-voltage, and current limit com- parators are very fast, and respond to short duration noise pulses. Layout considerations are therefore critical for opti- mum performance. The layout must be as neat and compact as possible, and all of the components must be as close as possible to their associated pins. The current loop formed by D1, L1, C2 and the SGND and ISEN pins should be as small as possible. The ground connection from C2 to C1 should be as short and direct as possible. If it is expected that the internal dissipation of the LM2695 will produce excessive junction temperatures during normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The exposed pad on the bottom of the IC package can be soldered to a ground plane, and that plane should extend out from beneath the IC, and be connected to ground plane on the board’s other side with several vias, to help dissipate the heat. The exposed pad is internally connected to the IC substrate. Additionally the use of wide PC board traces, where possible, can help conduct heat away from the IC. Judicious positioning of the PC board within the end product, along with the use of any available air flow (forced or natural convection) can help reduce the junc- tion temperatures. www.national.com 12 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |