Preliminary

PLL520-30

PECL and LVDS Low Phase Noise VCXO (for 65-130MHz Fund Xtal)

4. General Electrical Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current (Loaded Outputs)

PECL/LVDS

100/80

mA

Operating Voltage

3.13

3.47

V

Output Clock Duty Cycle

@ 1.25V (LVDS)

@ Vdd – 1.3V (PECL)

45

45

50

50

55

55

%

Short Circuit Current

±50

mA

5. Jitter specifications

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Period jitter RMS

77.76MHz

3.5*

ps

Period jitter peak-to-peak

77.76MHz

24*

ps

Integrated jitter RMS

Integrated 12 kHz to 20 MHz at 77.76MHz

0.5*

ps

*: To be measured

6. Phase noise specifications

PARAMETERS

FREQUENCY

@10Hz

@100Hz

@1kHz

@10kHz

@100kHz

UNITS

Phase Noise

relative to carrier

77.76MHz

-75

-95

-125

-145

-155

dBc/Hz

Note: Phase Noise at VCON = 0V – to be measured

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 4/20/04 Page 3