SLG46855 datasheet(2/200 Pages) DIALOG

2 / 200 page

Datasheet

23-Jul-2021

CFR0011-120-00

Revision 3.15

2 of 200

SLG46855

GreenPAK Programmable Mixed-Signal Matrix

Contents

General Description .................................................................................................................................................................1

Key Features.............................................................................................................................................................................1

Applications..............................................................................................................................................................................1

1 Block Diagram ......................................................................................................................................................................7

2 Pinout ....................................................................................................................................................................................8

2.1 Pin Configuration - STQFN- 14L ............................................................................................................................8

3 Characteristics ...................................................................................................................................................................11

3.1 Absolute Maximum Ratings .................................................................................................................................11

3.2 Electrostatic Discharge Ratings ...........................................................................................................................11

3.3 Recommended Operating Conditions .................................................................................................................11

3.4 Electrical Characteristics ......................................................................................................................................12

3.5 Timing Characteristics ..........................................................................................................................................18

3.6 Counter/Delay Characteristics .............................................................................................................................22

3.7 Oscillator Characteristics .....................................................................................................................................22

3.8 ACMP Characteristics ..........................................................................................................................................23

3.9 Analog Temperature Sensor Characteristics .......................................................................................................27

4 User Programmability ........................................................................................................................................................29

5 IO Pins .................................................................................................................................................................................30

5.1 GPIO Pins ............................................................................................................................................................30

5.2 GPI Pins ...............................................................................................................................................................30

5.3 GPO Pins .............................................................................................................................................................30

5.4 Pull-Up/Down Resistors .......................................................................................................................................30

5.5 Fast Pull-up/down during Power-up .....................................................................................................................30

5.6 GPI Structure .......................................................................................................................................................31

5.7 GPIO with I2C Mode IO Structure ........................................................................................................................32

5.8 Matrix OE IO Structure .........................................................................................................................................33

5.9 GPO Structure ......................................................................................................................................................35

5.10 IO Typical Performance .....................................................................................................................................36

6 Connection Matrix ..............................................................................................................................................................39

6.1 Matrix Input Table ...............................................................................................................................................40

6.2 Matrix Output Table ..............................................................................................................................................42

6.3 Connection Matrix Virtual Inputs ..........................................................................................................................45

6.4 Connection Matrix Virtual Outputs .......................................................................................................................45

7 Combination Function Macrocells ....................................................................................................................................46

7.1 2-Bit LUT or D Flip-Flop Macrocells .....................................................................................................................46

7.2 2-bit LUT or Programmable Pattern Generator ....................................................................................................49

7.3 3-Bit LUT or D Flip-Flop with Set/Reset Macrocells .............................................................................................51

7.4 4-Bit LUT or D Flip-Flop with Set/Reset Macrocell ...............................................................................................60

7.5 3-Bit LUT or Pipe Delay/Ripple Counter Macrocell ..............................................................................................62

8 Multi-Function Macrocells .................................................................................................................................................66

8.1 3-Bit LUT or DFF/Latch with 8-Bit Counter/Delay Macrocells ..............................................................................66

8.2 4-Bit LUT or DFF/Latch with 16-Bit Counter/Delay Macrocell ..............................................................................76

8.3 CNT/DLY/FSM Timing Diagrams .........................................................................................................................79

8.4 Wake and Sleep Controller ..................................................................................................................................87

9 Analog Comparators ..........................................................................................................................................................92

9.1 ACMP0H Block Diagram ......................................................................................................................................93

9.2 ACMP1H Block Diagram ......................................................................................................................................94

9.3 ACMP2L Block Diagram .....................................................................................................................................95

9.4 ACMP3L Block Diagram .....................................................................................................................................96

9.5 ACMP Typical Performance .................................................................................................................................97

10 Programmable Delay/Edge Detector ............................................................................................................................101

10.1 Programmable Delay Timing Diagram - Edge Detector OUTPUT ...................................................................101

11 Additional Logic Function. Deglitch Filter ...................................................................................................................102

12 Voltage Reference ..........................................................................................................................................................103

12.1 Voltage Reference Overview ...........................................................................................................................103

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