ICS149317 datasheet(8/11 Pages) ICST

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Clock Synthesizer for Portable Systems

MDS 1493-17 A

Revision 101005

Integr ated Circuit System s

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ICS1493-17

PRELIMINAR Y INFORMA T ION

Byte 0: Vendor ID, Revision Code

Byte Write Protocol

Byte Read Protocol

Bit

Description

Bit

Description

Start

2:8

Slave address - 7 bits

2:8

Slave address - 7 bits

Write = 0

Acknowledge from slave

11:18

Command code — 8 bit

‘10000000’ stands for byte operation,

bits[1:0] of the command code represents

the offset of the byte to be accessed

11:18

Command code — 8 bit

‘10000000’ stands for byte operation, bits[1:0]

of the command code represents the offset of

the byte to be accessed

Acknowledge from slave

20:27

Data byte from master— 8 bits

Repeat start

Acknowledge from slave

21:27

Slave address — 7 bits

Stop

Read = 1

Acknowledge from slave

30:37

Data byte from slave — 8 bits

Not Acknowledge from master

Stop

Bit

@Pup

Name

Description

Revision Code(MSB)

Revision Code

Revision Code(LSB)

Revision Code

Vendor ID(MSB)

Vendor ID

Vendor ID(LSB)

Vendor ID

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