84325EM

www.icst.com/products/hiperclocks.html

REV. B OCTOBER 11, 2004

8

Integrated

Circuit

Systems, Inc.

ICS84325

Figure 5A shows a schematic example of using an ICS84325. In

this example, the input is a 25MHz parallel resonant crystal with

load capacitor CL=18pF. The frequency fine tuning capacitors

C1 and C2 are 22pF respectively. This example also shows logic

control input handling.The configuration is set at F_SEL[1:0]=11

therefore the output frequency is 250MHz. It is recommended to

have one decouple capacitor per power pin. Each decoupling

capacitor should be located as close as possible to the power

pin. The low pass filter R7, C11 and C16 for clean analog supply

should also be located as close to the V

were chosen to minimize the ppm error. The optimum C1 and C2

values can be slightly adjusted for different board layouts.

C1

22p

X1

18pF Parallel Cry stal

C2

22p

XTAL2

XTAL1

R1

50

R3

50

R4

1K

Zo = 50

C6

0.1u

C1

22p

RD3

SP

Zo = 50

C5

0.1u

VCC

C16

10u

RU3

1K

C3

0.1u

VCC

C2

22p

U7

ICS84325

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

Q0

nQ0

Q1

nQ1

Q2

nQ2

Q3

nQ3

Q4

nQ4

Q5

nQ5

VCC

VEE

PLL_SEL

VCC

VCCA

VEE

XTAL2

XTAL1

MR

F_SEL1

F_SEL0

VCC

X1

25MHz,18pF

SP = Spare, Not Installed

R5

1K

RD2

SP

C11

0.1u

VCC

e.g. F_SEL[1:0]=11

(U1,16)

VCCA

(U1,13)

F_SEL1

(U1,24)

F_SEL0

F_SEL1

VCC

VCC

F_SEL0

VCC=3.3V

+

-

R7

24

R2

50

RU2

1K

The ICS84325 has been characterized with 18pF parallel resonant

crystals. The capacitor values, C1 and C2, shown in

Figure 3 below

were determined using a 25MHz, 18pF parallel resonant crystal and