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PCF8536AT Datasheet(PDF) 16 Page - NXP Semiconductors

Part # PCF8536AT
Description  Automotive 36 횞 4 LCD segment driver
PDF  53 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8536AT Datasheet(HTML) 16 Page - NXP Semiconductors

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NXP Semiconductors
PCA8551
Automotive 36 × 4 LCD segment driver
HOST
MICRO-
CONTROLLER
R ≤
tr
2Cb
SDA
SCL
36 segment drives
4 backplanes
LCD PANEL
(up to 144
elements)
PCA8551A
VDD
VSS
VSS
aaa-013190
VLCD
VLCD
VDD
CLK
n.c.
PORE
100 nF
100 nF
RST
The resistance of the power lines must be kept to a minimum. A decoupling capacitor of at least
100 nF is recommended for the supplies.
Figure 9. Typical system configuration using I2C-bus, internal power-on reset disabled
The host microcontroller manages the 2-line I2C-bus communication channel with
the PCA8551A. The internal oscillator is used and the internal POR is disabled in the
example. The appropriate biasing voltages for the multiplexed LCD waveforms are
generated internally. The only other connections required to complete the system are
the reset, the power supplies (VDD, VSS, and VLCD) and the LCD panel chosen for the
application.
HOST
MICRO-
CONTROLLER
SDIO
SCL
36 segment drives
4 backplanes
LCD PANEL
(up to 144
elements)
PCA8551B
VDD
VSS
VSS
aaa-013191
VLCD
VLCD
VDD
CLK
n.c.
PORE
100 nF
100 nF
CE
The resistance of the power lines must be kept to a minimum. A decoupling capacitor of at least
100 nF is recommended for the supplies.
Figure 10. Typical system configuration using SPI-bus, internal power-on reset enabled
The host microcontroller manages the 3-line SPI-bus communication channel with the
PCA8551B. The internal oscillator is enabled. The appropriate biasing voltages for
the multiplexed LCD waveforms are generated internally. The only other connections
required to complete the system are the power supplies (VDD, VSS, and VLCD) and the
LCD panel chosen for the application.
8.1 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider of three
impedances connected between VLCD and VSS. These intermediate levels are tapped
PCA8551
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 3.1 — 3 May 2021
16 / 53



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