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SMPS Fault Protection

Output Overvoltage Protection (OVP)

If the output voltage rises above 112% (typ) of its nomi-

nal regulation voltage, the controller sets the fault latch,

pulls POK_ low, shuts down the respective regulator, and

immediately pulls the output to ground through its low-

side MOSFET. Turning on the low-side MOSFET with

100% duty cycle rapidly discharges the output capaci-

tors and clamps the output to ground. However, this

commonly undamped response causes negative output

voltages due to the energy stored in the output LC at

the instant the OVP occurs. If the load cannot tolerate a

negative voltage, place a power Schottky diode across

the output to act as a reverse-polarity clamp. If the con-

dition that caused the overvoltage persists (such as a

shorted high-side MOSFET), the input source also fails

(short-circuit fault). Cycle VCC below 1V or toggle the

respective enable input to clear the fault latch and restart

the regulator.

Output Undervoltage Protection (UVP)

Each MAX17019 includes an output UVP circuit that

begins to monitor the output once the startup blanking

period has ended. If any output voltage drops below 88%

(typ) of its nominal regulation voltage, the UVP protection

immediately sets the fault latch, pulls the respective POK

output low, forces the high-side and low-side MOSFETs

into high-impedance states (DH = DL = low), and shuts

down the respective regulator. Cycle VCC below 1V or

toggle the respective enable input to clear the fault latch

and restart the regulator.

Thermal-Fault Protection

The MAX17019 features a thermal fault-protection circuit.

When the junction temperature rises above +160°C, a

thermal sensor activates the fault latch, pulls

all POK

outputs low, and shuts down

all regulators. Toggle SHDN

to clear the fault latch and restart the controllers after the

junction temperature cools by 15°C.

VTT LDO Detailed Description

VTT LDO Power-Good Output (POKD)

POKD is the open-drain output of a window comparator

that continuously monitors the VTT LDO output for under-

voltage and overvoltage conditions. POKD is actively held

low when the VTT LDO is disabled (OND = GND) and in

soft-start. Once the startup blanking time expires, POKD

becomes high impedance as long as the output remains

within ±6% (min) of the nominal regulation voltage set

by REFIND. POKD goes low once its corresponding

output drops or rises 12% (typ) beyond its nominal regu-

lation point or the output is shut down. For a logic-level

POKD output voltage, connect an external pullup resistor

between POKD and LDO5. A 100kΩ pullup resistor works

well in most applications.

VTT LDO Fault Protection

LDO Output OVP

If the output voltage rises above 112% (typ) of its nominal

regulation voltage, the controller sets the fault latch, pulls

POKD low, shuts down the source/sink linear regulator,

and immediately pulls the output to ground through its

low-side MOSFET. Turning on the low-side MOSFET with

100% duty cycle rapidly discharges the output capacitors

and clamps the output to ground. Cycle VCC below 1V or

toggle OND to clear the fault latch and restart the linear

regulator.

LDO Output UVP

Each MAX17019 includes an output UVP circuit that

begins to monitor the output once the startup blanking

period has ended. If the source/sink LDO output voltage

drops below 88% (typ) of its nominal REFIND regulation

voltage for 5ms, the UVP sets the fault latch, pulls the

POKD output low, forces the output into a highimpedance

state, and shuts down the linear regulator. Cycle VCC

below 1V or toggle OND to clear the fault latch and restart

the regulator.

SMPS Design Procedure

(Step-Down Regulators)

Firmly establish the input voltage range and maximum

load current before choosing a switching frequency and

inductor operating point (ripple-current ratio). The pri-

mary design trade-off lies in choosing a good switching

frequency and inductor operating point, and the following

four factors dictate the rest of the design:

•

Input voltage range. The maximum value (VIN(MAX))

must accommodate the worst-case, high ACadapter

voltage. The minimum value (VIN(MIN)) must account

for the lowest battery voltage after drops due to con-

nectors, fuses, and battery selector switches. If there

is a choice at all, lower input voltages result in better

efficiency.

•

Maximum load current. There are two values to

consider. The peak load current (ILOAD(MAX)) deter-

mines the instantaneous component stresses and

filtering requirements and thus drives output capacitor

selection, inductor saturation rating, and the design of

the current-limit circuit. The continuous load current

MAX17019

High-Input-Voltage Quad-Output Controller

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