ICS853111B datasheet(10/18 Pages) ICST

10 / 18 page

853111BY

www.icst.com/products/hiperclocks.html

REV. A JUNE 16, 2005

Integrated

Circuit

Systems, Inc.

ICS853111B

LOW SKEW, 1-TO-10

DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER

VCC - 2V

50Ω

RTT

Zo = 50Ω

FOUT

FIN

RTT =

((VOH + VOL) / (VCC – 2)) – 2

3.3V

125Ω

84Ω

Zo = 50Ω

FOUT

FIN

The clock layout topology shown below is a typical termina-

tion for LVPECL outputs. The two different layouts mentioned

are recommended only as guidelines.

FOUT and nFOUT are low impedance follower outputs that gen-

erate ECL/LVPECL compatible outputs.Therefore, terminating

resistors (DC current path to ground) or current sources must

be used for functionality. These outputs are designed to drive

50Ω transmission lines. Matched impedance techniques should

be used to maximize operating frequency and minimize signal

distortion.

Figures 4A and 4B show two different layouts which

are recommended only as guidelines. Other suitable clock lay-

outs may exist and it would be recommended that the board

designers simulate to guarantee compatibility across all printed

circuit and clock component process variations.

FIGURE 4B. LVPECL OUTPUT TERMINATION

FIGURE 4A. LVPECL OUTPUT TERMINATION

TERMINATION FOR 3.3V LVPECL OUTPUTS

ICS853111B Datasheet(PDF) 10 Page - Integrated Circuit Systems