MAXREFDES43# ZedBoard Quick Start Guide

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5. Included Files

The top level of the hardware design is a Xilinx ISE® Project Navigator Project (.XISE)

for Xilinx ISE version 14.4. The C-code design instantiates the Zynq® ARM core, the

support hardware required to run the Zynq ARM core, and the peripherals that interface

to the Pmod ports. This is supplied as a Xilinx software development kit (SDK) project

that includes a demonstration software application to evaluate the MAXREFDES43#

subsystem reference design. The lower level c-code driver routines are portable to the

user’s own software project.

Figure 7. Block diagram of FPGA hardware design.