MAX18066 datasheet(21/22 Pages) MAXIM

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Layout Procedure

Careful PCB layout is critical to achieve clean and stable

operation. It is highly recommended to duplicate the

MAX18066/MAX18166 evaluation kit layout for optimum

performance. If deviation is necessary, follow these guide-

lines for good PCB layout:

1) Connect input and output capacitors to the power

ground plane; connect all other capacitors to the

signal ground plane. Connect the signal ground plane

to the power ground plane at a single point adjacent to

the ground bump of the IC.

2) Place capacitors on VDD, IN, and SS as close as

possible to the device and the corresponding pin using

direct traces. Keep the power ground plane and signal

ground plane separate. Connect all GND bumps at

only one common point near the input bypass capaci-

tor return terminal.

3) Keep the high-current paths as short and wide as

possible. Keep the path of switching current short

and minimize the loop area formed by LX, the output

capacitors, and the input capacitors.

4) Connect IN, LX, and GND separately to large

copper areas to help cool the device to further improve

efficiency and long-term reliability.

5) For better thermal performance, maximize the copper

trace widths for consecutive bumps (LX, IN, GND)

using solder mask (SMD) lands.

6) Ensure all feedback connections are short and direct.

Place the feedback resistors and compensation

components as close as possible to the device.

7) Route high-speed switching nodes (such as LX and

BST) away from sensitive analog areas (such as SS,

FB, and COMP).

+Denotes a lead(Pb)-free/RoHS-compliant package.

Chip Information

PROCESS: BiCMOS

Ordering Information

PART NUMBER

TEMP RANGE

PIN-PACKAGE

FREQUENCY

MAX18066EWE+

-40°C to +85°C

16 WLP

500kHz

MAX18166EWE+

-40°C to +85°C

16 WLP

350kHz

www.maximintegrated.com

Maxim Integrated │ 21

MAX18066/MAX18166

High-Efficiency, 4A, Step-Down DC-DC

Regulators with Internal Power Switches

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