AT90USB646 datasheet(173/434 Pages) ATMEL

173 / 434 page

173

7593A–AVR–02/06

AT90USB64/128

17. Serial Peripheral Interface – SPI

The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the

AT90USB64/128 and p eripheral de vices or be tween several AVR devices. T he

AT90USB64/128 SPI includes the following features:

•

Full-duplex, Three-wire Synchronous Data Transfer

•

Master or Slave Operation

•

LSB First or MSB First Data Transfer

•

Seven Programmable Bit Rates

•

End of Transmission Interrupt Flag

•

Write Collision Flag Protection

•

Wake-up from Idle Mode

•

Double Speed (CK/2) Master SPI Mode

USART can also be used in Master SPI mode, see “USART in SPI Mode” on page 207.

The Power Reduction SPI bit, PRSPI, in “Power Reduction Register 0 - PRR0” on page 55 on

page 50 must be written to zero to enable SPI module.

Figure 17-1. SPI Block Diagram(1)

Note:

1. Refer to Figure 1-1 on page 3, and Table 10-6 on page 81 for SPI pin placement.

The interconnection between Master and Slave CPUs with SPI is shown in Figure 17-2. The sys-

tem consists of two shift Registers, and a Master clock generator. The SPI Master initiates the

communication cycle when pulling low the Slave Select SS pin of the desired Slave. Master and

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AT90USB646 Datasheet(PDF) 173 Page - ATMEL Corporation