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DS2152L Datasheet(PDF) 76 Page - Maxim Integrated Products |
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DS2152L Datasheet(HTML) 76 Page - Maxim Integrated Products |
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76 / 97 page ![]() DS2152 76 of 97 15.1 Receive Clock and Data Recovery The DS2152 contains a digital clock recovery system. See Figure 1-1 and Figure 15-1 for more details. The DS2152 couples to the receive T1 twisted pair via a 1:1 transformer. See Table 15-2 for transformer details. The 1.544MHz clock attached at the MCLK pin is internally multiplied by 16 via an internal PLL and fed to the clock recovery system. The clock recovery system uses the clock from the PLL circuit to form a 16 times oversampler which is used to recover the clock and data. This oversampling technique offers outstanding jitter tolerance (see Figure 15-2). Normally, the clock that is output at the RCLKO pin is the recovered clock from the T1 AMI/B8ZS waveform presented at the RTIP and RRING inputs. When no AMI signal is present at RTIP and RRING, a Receive Carrier Loss (LRCL) condition will occur and the RCLKO will be sourced from the clock applied at the MCLK pin. If the jitter attenuator is either placed in the transmit path or is disabled, the RCLKO output can exhibit slightly shorter high cycles of the clock. This is due to the highly over- sampled digital clock recovery circuitry. If the jitter attenuator is placed in the receive path (as is the case in most applications), the jitter attenuator restores the RCLK to being close to 50% duty cycle. See the Receive AC Timing Characteristics in Section 18 for more details. 15.2 Transmit Waveshaping and Line Driving The DS2152 uses a set of laser-trimmed delay lines along with a precision Digital-to-Analog Converter (DAC) to create the waveforms that are transmitted onto the T1 line. The waveforms created by the DS2152 meet the latest ANSI, AT&T, and ITU specifications. See Figure 15-3. The user will select which waveform is to be generated by properly programming the L2/L1/L0 bits in the Line Interface Control Register (LICR). The DS2152 can set up in a number of various configurations depending on the application. See Table 15-1 and Figure 15-1. Table 15-1. Line Build-Out Select in LICR L2 L1 L0 LINE BUILD-OUT APPLICATION 0 0 0 0 to 133ft/0dB DSX-1/CSU 0 0 1 133ft to 266ft DSX-1 0 1 0 266ft to 399ft DSX-1 0 1 1 399ft to 533ft DSX-1 1 0 0 533ft to 655ft DSX-1 1 0 1 -7.5dB CSU 1 1 0 -15dB CSU 1 1 1 -22.5dB CSU Due to the nature of the design of the transmitter in the DS2152, very little jitter (less than 0.005UIP-P broadband from 10Hz to 100kHz) is added to the jitter present on TCLKI. Also, the waveforms that they create are independent of the duty cycle of TCLK. The transmitter in the DS2152 couples to the T1 transmit twisted pair via a 1:1.15 or 1:1.36 step-up transformer as shown in Figure 15-1. For the devices to create the proper waveforms, this transformer used must meet the specifications listed in Table 15-2. |
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