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ICS889874 Datasheet(PDF) 3 Page - Integrated Circuit Systems |
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ICS889874 Datasheet(HTML) 3 Page - Integrated Circuit Systems |
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3 / 14 page ![]() 889874AK www.icst.com/products/hiperclocks.html REV. A MAY 19, 2004 3 Integrated Circuit Systems, Inc. ICS889874 1:2 DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER PRELIMINARY TABLE 3B. TRUTH TABLE s t u p n I s t u p t u O T E S E R n2 S1 S0 S 10 X X ) h g u o r h t s s a p ( k c o l C e c n e r e f e R 11 0 0 2 ÷ k c o l C e c n e r e f e R 11 0 1 4 ÷ k c o l C e c n e r e f e R 11 1 0 8 ÷ k c o l C e c n e r e f e R 1 111 6 1 ÷ k c o l C e c n e r e f e R 01 X X H G I H = Q n , W O L = Q ) 1 E T O N ( ; e l b a s i D k c o l C 00 X X H G I H = Q n , W O L = Q ) 1 E T O N ( ; e l b a s i D k c o l C t u p n i k c o l c t x e n e h t n o d e t r e s s a s i n o i t c n u f e l b a s i D / t e s e R : 1 E T O N . n o i t i s n a r t w o l - o t - h g i h ) N I n / N I ( tPD tRR VOUT Swing VCC/2 VIN FIGURE 1. nRESET TIMING DIAGRAM (WHEN S2 = 1) TABLE 3A. CONTROL INPUT FUNCTION TABLE s t u p n Is t u p t u O T E S E R ne c r u o S d e t c e l e S1 Q , 0 Q1 Q n , 0 Q n 0N I n , N IW O L ; d e l b a s i DH G I H ; d e l b a s i D 1N I n , N Id e l b a n Ed e l b a n E a g n i w o ll o f d e l b a n e r o d e l b a s i d e r a s t u p t u o k c o l c e h t , s e h c t i w s T E S E R n r e t f A : E T O N n i n w o h s s a e g d e k c o l c t u p n i g n il l a f r u g i F e . 1 nRESET IN nIN nQ Q |
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