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ICS889874 Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS889874 Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 14 page ![]() 889874AK www.icst.com/products/hiperclocks.html REV. A MAY 19, 2004 1 Integrated Circuit Systems, Inc. ICS889874 1:2 DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER PRELIMINARY GENERAL DESCRIPTION The ICS889874 is a high speed 1:2 Differential- to-LVPECL Buffer/Divider and is a member of the HiPerClockS ™ family of high performance clock solutions from ICS. The ICS889874 has a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider, which allows the device to be used as either a 1:2 fanout buffer or frequency divider. The clock input has internal termination resistors, allowing it to interface with several differential signal types while minimizing the number of required external components. The device is packaged in a small, 3mm x 3mm VFQFN package, making it ideal for use on space-constrained boards. FEATURES • 2 LVPECL outputs • Frequency divide select options: ÷ 1, ÷ 2, ÷4, ÷8, ÷16 • IN, nIN input can accept the following differential input levels: LVPECL, LVDS, CML • Output frequency: > 2.5GHz • Output skew: 5ps (typical) • Part-to-part skew: TBD • Additive jitter, RMS: <0.03ps (design target) • Supply voltage range: (LVPECL), 2.375V to 3.465V Supply voltage range: (ECL), -3.465V to -2.375V • -40°C to 85°C ambient operating temperature • Pin compatible with SY89874U BLOCK DIAGRAM PIN ASSIGNMENT HiPerClockS™ ICS Q0 nQ0 Q1 nQ1 S2 nRESET IN V T nIN S0 S1 V REF_AC ICS889874 16-Lead VFQFN 3mm x 3mm x 0.95 package body K Package Top View Q0 nQ0 Q1 nQ1 IN VT VREF_AC nIN Enable MUX Enable FF Decoder 00 ÷2 01 ÷4 10 ÷8 11 ÷16 0 1 1 2 3 4 12 11 10 9 5 6 7 8 16 15 14 13 The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. |
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