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MAX22192 Datasheet(PDF) 21 Page - Maxim Integrated Products |
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MAX22192 Datasheet(HTML) 21 Page - Maxim Integrated Products |
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21 / 50 page ![]() Detailed Description The MAX22192 senses the state (on, high or off, low) of eight digital inputs. The voltages at the IN1 to IN8 input pins are compared against internal references to deter- mine whether the sensor is ON (logic 1) or OFF (logic 0). All eight inputs are simultaneously latched by the asser- tion of either LLATCH or LCS, and the data made avail- able in a serialized format using the isolated SPI interface. Placing a 7.5kΩ current-setting resistor between REFDI and GNDF, and a 1.5kΩ resistor between each field input and the corresponding IN_ input pin ensures that the cur- rent at the ON and OFF trip points, as well as the voltage at the trip points, satisfy the requirements of IEC 61131-2 for Type 1 and Type 3 inputs. The current sunk by each input pin rises linearly with input voltage until the level set by the current limiter is reached; any voltage increase beyond this point does not increase the input current. Limiting the input current ensures compliance with IEC 61131-2 while significantly reducing power dissipation compared to traditional resistive inputs. The current-setting resistor RREFDI can be calculated using this equation: RREFDI = 17.63V / IINLIM Input Filters Each input (IN1–IN8) has a programmable filter and input data can be filtered to reduce noise, or it can be read directly for more rapid response. The input is sampled and data is updated at 1MHz (typ) when the input filter is disabled. When the digital filter is enabled, the input is sampled at 200kHz (typ). Bit FBP in the correspond- ing FLT_ register is used to bypass the filter or to enable the filter. One of eight filter delays (50µs, 100µs, 400µs, 800µs, 1.6ms, 3.2ms, 12.8ms, 20ms) can be indepen- dently selected for each channel. Noise rejection is accomplished through a nonrollover up-down counter where the state of the field input controls the counting direction (up or down). The filter uses an up-down coun- ter fed by a 200kHz clock. If the input is high, it counts up; if the input is low, it counts down. The filter output is updated when the counter hits the upper or lower limit, with the upper limit depending on the selected filter delay and the lower limit being zero regardless of the filter delay. The low-to-high transition of the filter occurs when the counter reaches the upper limit. The high-to-low transi- tion occurs when the counter reaches the lower limit. There is no rollover; counting simply stops when the upper or lower limit is hit. The filter delay is the time it takes to reach the upper/lower limit in response to a step input when the counter starts from the lower/upper limit. Figure 4. Switching Characteristics for IEC 61131-2 Type 1, 2, and 3 24VDC Digital Inputs MAX22192 Octal Industrial Digital Input with Diagnostics and Digital Isolation www.maximintegrated.com Maxim Integrated │ 21 VLMIN TYPE OF LIMIT TYPE 1 LIMITS TYPE 2 LIMITS TYPE 3 LIMITS OFF REGION TRANSITION ON REGION OFF REGION TRANSITION ON REGION OFF REGION TRANSITION ON REGION VL (V) IL (mA) VT (V) IT (mA) VH (V) IH (mA) VL (V) IL (mA) VT (V) IT (mA) VH (V) IH (mA) VL (V) IL (mA) VT (V) IT (mA) VH (V) IH (mA) MAX 15/5 15 15 15 30 15 11/5 30 11 30 30 30 11/5 15 11 15 30 15 MIN -3 ND 5 0.5 15 2 -3 ND 5 2 11 6 -3 ND 5 1.5 11 2 0 IIN (mA) VIN (V) OFF REGION ON REGION TRANSITION REGION VHMAX VHMIN or VTMAX IHMIN IHMAX ILMIN ILMAX VLMAX or VTMIN ITMIN ITMAX STANDARD OPERATING RANGE FOR 24V DC DIGITAL INPUTS (CURRENT SINKING) VLMAX ND = NOT DEFINED |
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