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MSM6502B/6512

¡ Semiconductor

PIN DESCRIPTIONS

Symbol

Description

GND

Ground pin

Power supply pins

Crystal OSC input, internal clock input

Crystal OSC input, internal clock output

P0.0 to P0.3

P1.0 to P1.3

Pseudo-bidirectional ports for 4-bit parallel I/O. To input data from these ports,

it is necessary to write "1" beforehand.

The port to be selected is specified by the L register. The register contents and

the corresponding specified ports are listed below.

Note: P3, P4, and P5 are internal ports.

P2.0 to P2.3

Input port for 4-bit parallel input with no latching function.

INT

Input pin to request an interrupt from the external circuit. The input flag is set at

the falling edge of the input signal.

6, 7, OEH, OFH

5, 0DH

4, 0CH

3, 0BH

2, 0AH

1, 9

0, 8

Content of L Register

P5

P4

P3

P2

P1

P0

Port Specified

No designation

RESET

The reset mode starts after "0" is input to the RESET pin for more than 2

machine cycles.

The reset signal has priority over all of other signals and performs the following

operations automatically:

(1) Resets all bits of the PC (program counter) to"0".

(2) Sets all bits of the parallel I/O ports (P0.0 to P1.3) to "1"

(4) Resets the skip flag.

(5) Resets all bits of the time base counter (TBC).

(6) Resets the interrupt request flag (IRQF).

(7) Resets the interrupt enable flag (EIF).

(8) Resets the master interrupt enable flag (MEIF).

(9) Sets all bits of the stack pointer (SP) to "1" .

(10) Initializes the segment and common outputs.

(11) Sets all bits of the index register (IDR) to "1".

possible to achieve power ON reset by connecting it with an external capacitor.

Pin

24

21, 49

22

23

1 to 4

5 to 8

9 to 12

16

15