MPC8347ECVRADDB datasheet(82/99 Pages) NXP

Part #	MPC8347ECVRADDB

Description	MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications

PDF	99 Pages

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Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12

Freescale Semiconductor

Clocking

VCO divider must be set properly so that the core VCO frequency is in the

range of 800–1800 MHz.

Table 63. e300 Core PLL Configuration

RCWL[COREPLL]

core_clk : csb_clk Ratio

VCO Divider1

1 Core VCO frequency = core frequency

× VCO divider. The VCO divider must be set properly so that the core VCO frequency

is in the range of 800–1800 MHz.

0–1

2–5

0000

PLL bypassed

(PLL off, csb_clk clocks core directly)

PLL bypassed

(PLL off, csb_clk clocks core directly)

0001

01:1

0001

01:1

0001

01:1

0001

01:1

0001

1.5:1

0001

1.5:1

0001

1.5:1

0001

1.5:1

0010

02:1

0010

02:1

0010

02:1

0010

02:1

0010

2.5:1

0010

2.5:1

0010

2.5:1

0010

2.5:1

0011

03:1

0011

03:1

0011

03:1

0011

03:1

MPC8347ECVRADDB Datasheet(PDF) 82 Page - NXP Semiconductors

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