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AX58400 Datasheet(PDF) 1 Page - ASIX Electronics Corporation

Part # AX58400
Description  EtherCAT Slave Controller with Dual-Core MCU
PDF  2 Pages
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Manufacturer  ASIX [ASIX Electronics Corporation]
Direct Link  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX58400 Datasheet(HTML) 1 Page - ASIX Electronics Corporation

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AX58400
Product Brief
EtherCAT Slave Controller with Dual-Core MCU
Release Date: 11/05/2021
ASIX Electronics Corporation
4F, No. 8, Hsin Ann Road, Hsinchu Science Park, Hsinchu, 30078, Taiwan
TEL: +886-3-5799500 FAX: +886-3-5799558
Email: sales@asix.com.tw
https://www.asix.com.tw/
The AX58400 EtherCAT Slave Controller w/ Dual-Core MCU is a System-in-Package (SiP) product
based on the STM32H755 microcontroller from STMicroelectronics. AX58400 is equipped with
Dual-Core 32-bit ARM® Cortex®-M7 core with DSP extension runs up to 480 MHz, 32-bit ARM®
Cortex®-M4 core with Adaptive Real-Time Accelerator (ST ART Accelerator™) runs up to 240 MHz
and EtherCAT Slave Controller (ESC) with two integrated Fast Ethernet PHYs. AX58400 supports
AES/TDES/HASH/HMAC hardware cryptographic accelerators, ROP/PCROP/Anti-tamper security
techniques, true random number generator, and additional communication interfaces such as
10/100Mbps Ethernet MAC, USB 2.0 OTG, Camera I/F, TFT-LCD Controller, JPEG Codec,
SPI/UART/I2C/I2S/SAI/CAN/SDMMC/ADC/DAC/HDMI-CEC/PWM/DFSDM, etc.
The AX58400 is interoperable with all EtherCAT systems with standard EtherCAT protocols such as
CoE, FoE, VoE, etc. and is suitable for motor/motion control, digital I/O control, sensors data
acquisition, robotics, EtherCAT IO-Link master, EtherCAT Junction slave module, EtherCAT
communication module, etc. industrial automation fieldbus applications.
Key Features
A System-in-Package (SiP) product based on ST
STM32H755 microcontroller and ASIX EtherCAT slave
controller
STM32H755 Microcontroller
Dual-Core ARM® Cortex®-M7 & Cortex®-M4 RISC Cores
• ARM® Cortex®-M7 core with double-precision FPU and
L1 cache: 16 Kbytes of data and 16 Kbytes of instruction
cache, running up to 480 MHz
• ARM® Cortex®-M4 core with FPU, Adaptive Real-Time
Accelerator (ST ART Accelerator™) for internal Flash
and external memories, running up to 240 MHz
• Dual bank 2 Mbytes Flash memory and 1 Mbyte SRAM
• Dual mode Quad-SPI memory interface up to 133 MHz
Communication/Analog Interfaces
• 1x 10/100Mbps Ethernet MAC with IEEE 1588
• 2x USB OTG interfaces
• 1x Digital Camera interface
• 4x I2C, 6× SPI, 3x I2S, 4x SAI, 2x CAN
• 4x UART, 4x USART and 1x LPUART
• 1x SPDIFRX interface, 1x SWPMI
• 2x SDMMC host interfaces (SD/SDIO/MMC)
• 1x HDMI-CEC
• 3x 16-bit ADC, 2× 12-bit DAC
• 1x Temperature Sensor
• 2x Ultra-low-power Analog Comparators
• 2x Operational Amplifiers
• 1x DFSDM (Digital Filters for Σ-Δ Modulator)
• Up to 97 GPIOs with interrupt capability
Graphics
• TFT-LCD controller up to XGA resolution
• Hardware JPEG Codec
• ST Chrom-ART graphical hardware Accelerator™
(DMA2D) to reduce CPU loading
Block Diagram


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