3.4

Pin Descriptions

This section contains descriptions of the various LAN8670/1/2 pins. The “_N” symbol in the signal name indicates

that the active, or asserted, state occurs when the signal is at a low voltage level. For example, RESET_N indicates

that the reset signal is active low. When “_N” is not present after the signal name, the signal is asserted when at the

high voltage level.

The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture

of “active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent

of whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is

inactive.

Pin buffer type definitions are detailed in the Buffer Types section.

Table 3-4. MII/RMII Signals

Name

Symbol

Buffer Type

Description

Transmit Data 0

TXD0

VIS-VDDP

Transmit data bus bit 0 (all modes)

Transmit Data 1

TXD1

VIS-VDDP

Transmit data bus bit 1 (all modes)

Transmit Data 2

(MII Mode)

TXD2

VIS-VDDP

Transmit data bus bit 2 (MII mode)

In RMII mode, this signal is not used and is internally pulled-

down to VSS.

Transmit Data 3

(MII Mode)

TXD3

VIS-VDDP

Transmit data bus bit 3 (MII mode)

In RMII mode, this signal is not used and is internally pulled-

down to VSS.

Transmit Error

(MII Mode)

TXER

VIS-VDDP

This signal is asserted to indicate that an error was detected

somewhere in the packet presently being transferred to the

transceiver.

This pin is unused in RMII mode and should be connected to

VSS.

Transmit Enable

TXEN

VIS-VDDP

Indicates that valid transmission data is present on TXD[3:0]. In

RMII mode, only TXD[1:0] provide valid data.

Note:  A pull-down resistor is recommended to prevent

incidental transmission if the MAC does not actively pull-down

or drive this pin low at all times during its reset and initialization.

Transmit Clock

(MII Mode)

TXCLK

VO-VDDP

2.5 MHz clock used to latch data from the MAC into the

transceiver.

In RMII mode, this pin is unused and is driven low. It should be

left unconnected.

Receive Data 0

RXD0

VOH-VDDP

Receive data bus bit 0 (all modes)

Receive Data 1

RXD1

VOH-VDDP

Receive data bus bit 1 (all modes)

Receive Data 2

(MII Mode)

RXD2

VO-VDDP

Receive data bus bit 2 (MII mode)

In RMII mode, this pin is unused and is driven low.

Receive Data 3

(MII Mode)

RXD3

VO-VDDP

Receive data bus bit 3 (MII mode)

In RMII mode, this pin is unused and is driven low.

Receive Error

RXER

VOH-VDDP

This signal is asserted to indicate that an error was detected

somewhere in the packet presently being transferred from the

transceiver.

This signal is optional in RMII mode.

LAN8670/1/2

Pin Description and Configuration

and its subsidiaries

Product Brief

DS60001536E-page 12