ISO6760LDWR datasheet(13/44 Pages) TI

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6.15 Switching Characteristics—5-V Supply

VCC1 = VCC2 = 5 V ±10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

ISO6760L

tPLH, tPHL

Propagation delay time

One input in static state and other input

is toggled at 100kbps. See Switching

Characteristics Test Circuit and Voltage

Waveforms

20.5

PWD

Pulse width distortion(1) |tPHL – tPLH|

tsk(o)

Channel-to-channel output skew time(2)

Same-direction channels

tsk(pp)

Part-to-part skew time(3)

Output signal rise time

See Switching Characteristics Test

Circuit and Voltage Waveforms

2.6

4.5

Output signal fall time

2.6

4.5

tPU

Time from UVLO to valid output data

Time from UVLO to

valid output data

300

tDO

Default output delay time from input power loss

Measured from the time VCC goes

below 1.2V. See Default Output

Delay Time Test Circuit and Voltage

Waveforms

0.1

0.3

tie

Time interval error

216 – 1 PRBS data at 50 Mbps

(1)

Also known as pulse skew.

(2)

tsk(o) is the skew between outputs of a single device with all driving inputs connected together and the outputs switching in the same

direction while driving identical loads.

(3)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

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ISO6760L

SLLSFO3 – DECEMBER 2021

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