Unused push-pull CMOS outputs should be left disconnected.

8.3.2 CMOS Schmitt-Trigger Inputs

This device includes inputs with the Schmitt-trigger architecture. These inputs are high impedance and are

typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics table

from the input to ground. The worst case resistance is calculated with the maximum input voltage, given in the

Absolute Maximum Ratings table, and the maximum input leakage current, given in the Electrical Characteristics

table, using Ohm's law (R = V ÷ I).

table, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much

slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the

inputs with slow transitioning signals will increase dynamic current consumption of the device. For additional

information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers.

8.3.3 Clamp Diode Structure

The inputs and outputs to this device have both positive and negative clamping diodes as depicted in Figure 8-2.

CAUTION

Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage

to the device. The input and output voltage ratings may be exceeded if the input and output clamp-

current ratings are observed.

GND

Logic

Input

Output

Device

Figure 8-2. Electrical Placement of Clamping Diodes for Each Input and Output

8.3.4 Wettable Flanks

This device includes wettable flanks for at least one package. See the Features section on the front page of the

data sheet for which packages include this feature.

Package

We able Flank Lead

PCB

Pad

Standard Lead

Package

Solder

Figure 8-3. Simplified Cutaway View of Wettable-Flank QFN Package and Standard QFN Package After

Soldering

SN74HCS151-Q1

SCLS819B – AUGUST 2020 – REVISED DECEMBER 2021

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