8.2.2 Balanced CMOS Push-Pull Outputs

This device includes balanced CMOS push-pull outputs. The term balanced indicates that the device can sink

and source similar currents. The drive capability of this device may create fast edges into light loads so routing

and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable

of driving larger currents than the device can sustain without being damaged. It is important for the output power

of the device to be limited to avoid damage due to overcurrent. The electrical and thermal limits defined in the

Absolute Maximum Ratings must be followed at all times.

Unused push-pull CMOS outputs should be left disconnected.

8.2.3 Latching Logic

This device includes latching logic circuitry. Latching circuits commonly include D-type latches and D-type

flip-flops, but include all logic circuits that act as volatile memory.

When the device is powered on, the state of each latch is unknown. There is no default state for each latch at

start-up.

The output state of each latching logic circuit only remains stable as long as power is applied to the device within

the supply voltage range specified in the Recommended Operating Conditions table.

8.2.4 Clamp Diode Structure

The inputs and outputs to this device have both positive and negative clamping diodes as depicted in Figure 8-2.

CAUTION

Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage

to the device. The input and output voltage ratings may be exceeded if the input and output clamp-

current ratings are observed.

GND

Logic

Input

Output

Device

Figure 8-2. Electrical Placement of Clamping Diodes for Each Input and Output

SN74HCS595-Q1

SCLS785F – DECEMBER 2019 – REVISED DECEMBER 2021

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