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Data Sheet

AD7380-4

Rev. 0 | Page 19 of 31

RESOLUTION BOOST

The default resolution and output data size for the AD7380-4 is

16 bits. When the on-chip oversampling function is enabled the

performance of the ADC can exceed the default resolution. To

accommodate the performance boost achievable, it is possible

to enable an additional two bits of resolution. If the RES bit in

the CONFIGURATION1 register is set to Logic 1 and the

AD7380-4 is in a valid oversampling mode, the conversion

result size for the AD7380-4 is 18 bits. In this mode, 18 SCLK

cycles are required to propagate the data for the AD7380-4.

ALERT

The alert functionality is an out of range indicator and can be

used as an early indicator of an out of bounds conversion

result. An alert event triggers when the value in the conversion

result register exceeds the alert high limit value in the alert high

threshold register or falls below the alert low limit value in the

alert low threshold register. The alert high threshold register

and the alert low threshold register are common to all ADCs.

When setting the threshold limits, the alert high threshold must

always be greater than the alert low threshold. Detailed alert

information is accessible in the alert indication register.

The register contains two status bits per ADC, one corresponding

to the high limit, and the other to the low limit. A logical OR of

alert signals for all ADCs creates a common alert value. This

value can be configured to drive out on the ALERT function of

the SDOD/ALERT pin. The SDOD/ALERT pin is configured as

ALERT by configuring the following bits in CONFIGURATION1

and CONFIGURATION2:

•

Set the SDO bits to any value other than 0b10.

•

Set the ALERT_EN bit to 1.

•

Set a valid value in the alert high threshold register and the

alert low threshold register.

The alert indication function is available in oversampling

(rolling average, normal averaging, and in nonoversampling

modes).

The alert function of the SDOD/ALERT pin updates at the end

of conversion. The alert indication status bits in the ALERT

the next conversion.

Bits[7:0] in the alert indication register are cleared by reading

the alert indication register contents. The alert function of the

SDOD/ALERT pin is cleared with a falling edge of CS. Issuing a

software reset also clears the alert status in the alert indication

See Figure 8 for the ALERT timing diagram.

SDOB

SCLK

DB17

DB16

DB15

DB14

DB13

DB4

DB3

DB2

DB1

DB0

DB2

DB1

DB0

SDOA,

SDI

Figure 33. Resolution Boost

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