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USB4715 Datasheet(PDF) 11 Page - Microchip Technology |
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USB4715 Datasheet(HTML) 11 Page - Microchip Technology |
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11 / 47 page  2022 Microchip Technology Inc. and its subsidiaries DS00002514B-page 11 USB4715 External 25 MHz Reference Clock Input CLK_IN ICLK External reference clock input. The device may alternatively be driven by a single- ended clock oscillator. When this method is used, XTALO should be left unconnected. External 25 MHz Crystal Output XTALO OCLK External 25 MHz crystal output. Test TESTEN A Test pin. This signal is used for test purposes and must always be connected to ground. Analog Test ATEST A Analog test pin. This signal is used for test purposes and must always be connected to ground. Test 1 TEST1 A Test 1 pin. This signal is used for test purposes and must always be pulled-up to 3.3V via a 4.7 kΩ resistor. Test 2 TEST2 A Test 2 pin. This signal is used for test purposes and must always be pulled-down to ground via a 4.7 kΩ resistor. Test 3 TEST3 A Test 3 pin. This signal is used for test purposes and must always be pulled-down to ground via a 4.7 kΩ resistor. Configuration Straps Device Mode Configuration Straps 2-1 CONFIG_STRAP_[2:1] I Device mode configuration straps 2-1. These configuration straps are used to select the device’s mode of operation. See Note 3-1. Refer to Section 3.3.4, "PROG_FUNC[8:1] Configura- tion (CONFIG_STRAP_[2:1])" for additional information. Port 4-1 D+ Disable Configuration Strap PRT_DIS_P[4:1] I Port 4-1 D+ Disable configuration strap. These configuration straps are used in conjunction with the corresponding PRT_DIS_M[4:1] straps to disable the related port (5-1). See Note 3-1. Both USB data pins for the corresponding port must be tied to 3.3V to disable the associated downstream port. TABLE 3-2: PIN DESCRIPTIONS (CONTINUED) Name Symbol Buffer Type Description |
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