PI6C410M datasheet(8/21 Pages) PERICOM

8 / 21 page

PS8736C

12/19/05

PI6C410M/410MA

Clock Generator for Intel

PCI Express Mobile Chipset

Data Byte 6: Control Register

Bit

Descriptions

Type

Power Up

Condition

Output(s) Affected

Source

FS_A Reflects the value of the

FS_A pin sampled on power up

0 = FS_A was low during

Vtt_Pwrgd# assertion

Externally Se-

lected

CPU[0:2]

35, 36, 40, 41, 43,

FS_B Reflects the value of the

FS_B pin sampled on power up

0 = FS_B was low during

Vtt_Pwrgd# assertion

Externally Se-

lected

CPU[0:2]

35, 36, 40, 41, 43,

FS_C Reflects the value of the

FS_C pin sampled on power up

0 = FS_C was low during

Vtt_Pwrgd# assertion

Externally Se-

lected

CPU[0:2]

35, 36, 40, 41, 43,

PCI_Stop control

1 = Disabled,

0 = Enabled, Stopped SRC and

PCI clocks

1 = Disabled

All PCI & SRC

clocks except PCIF

and SRC clocks set to

free-running

3, 4, 5, 17, 18, 19,

20, 22, 23, 24, 25,

26, 27, 30, 31, 32,

33, 35, 36, 56

REF Output Drive Strength

0 = 1x, 1 = 2x

1 = 2X

REF

Reserved

Test Clock Mode Entry Control

0 = Disabled, 1 = REF/N or Hi-Z

0 = Disabled

Test Clock Mode

0 = Hi-Z, 1 = REF/N

0 = Hi-Z

CPU[0:2],

SRC[0:7],

PCI[2:5],

PCIF[0:1], REF,

USB_48, DOT_96

3, 4, 5, 8, 9, 12,

14, 15, 17, 18, 19,

20, 22, 23, 24, 25,

26, 27, 30, 31, 32,

33, 35, 36, 40, 41,

43, 44, 52, 56

DataByte 7: Control Register

Bit

Descriptions

Type

Power Up Condition

Output(s) Affected

Vendor ID

Revision Code

PI6C410M Datasheet(PDF) 8 Page - Pericom Semiconductor Corporation

PI6C410M Datasheet(HTML) 8 Page - Pericom Semiconductor Corporation

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