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MAX11162 Datasheet(PDF) 21 Page - Maxim Integrated Products

Part # MAX11162
Description  16-Bit, 500ksps, 5V Unipolar Input, SAR ADC, in Tiny 10-Pin 關MAX
PDF  28 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX11162 Datasheet(HTML) 21 Page - Maxim Integrated Products

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Maxim Integrated │ 21
MAX11162
16-Bit, 500ksps, +5V Unipolar Input,
SAR ADC, in Tiny 10-Pin µMAX
www.maximintegrated.com
Daisy-Chain Mode, No-Busy Indicator
The daisy-chain mode with no-busy indicator is ideally
suited for multichannel isolated applications that require
minimal wiring complexity. Simultaneous sampling of
multiple ADC channels is realized on a 3-wire serial interface
where data readback is analogous to clocking a shift
register. In Figure 13, two ADCs are connected to an SPI-
compatible digital host with corresponding timing given in
Figure 14.
The daisy-chain mode is engaged when the MAX11162
detects the low state on SDI at the rising edge of CNVST.
In this mode, CNVST is brought low and then high to trigger
the completion of the acquisition phase and the start of a
conversion. A low SCLK state on the rising edge of CNVST
signals to the internal controller that the no-busy indicator
will be output. When in chain mode, the SDO output is
driven active at all times.
When SDI and CNVST are both low, SDO is driven low,
thus engaging the daisy-chain mode of operations on the
downstream MAX11162 parts. For example, in Figure 13
part A has its SDI tied low so the chain mode of operation will
be selected on every conversion. When CNVST goes
low to trigger another conversion, part A’s SDO and
consequently part B’s SDI go low as well. On the next
CNVST rising edge both parts A and B will select the daisy-
chain mode interface.
When a conversion is complete, the MSB is presented onto
SDO, and the MAX11162 returns to the acquisition phase.
The remaining data bits, stored within the internal shift
register, are clocked out on each subsequent SCLK falling
edge. The SDI input of each ADC in the chain is used to
transfer conversion data from the previous ADC into the
internal shift register of the next ADC, thus allowing for data
to be clocked through the multichip chain on each SCLK
falling edge. Each ADC in the chain outputs its MSB data
first requiring 16 × N clocks to read back N ADCs.
In daisy-chain mode, the maximum conversion rate is
reduced due to the increased readback time. For instance,
with a 6ns digital host setup time and 3V interface, up to
Figure 13. Daisy-Chain Mode, No-Busy Indicator Connection Diagram
Figure 14. Daisy-Chain Mode, No-Busy Indicator Serial Interface Timing
DAISY-CHAIN MODE, NO BUSY INDICATOR SERIAL INTERFACE TIMING
DA15
SCLK
SDOA = SDIB
1
2
3
14
15
16
CNVST
tCONV
CONVERSION
ACQUISITION
ACQUISITION
DA14
DA13
DA1
DA0
tSCLKL
tSCLKH
tDSDO
30
31
32
17
18
tHSCKCNV
tSSCKCNV
SDOB
DB15
DB14
DB13
DB1
DB0
DA15
DA14
DA1
DA0
tSSDISCK
tHSDISCK
tCNVPW
SELECT NO
BUSY
OUTPUT
SELECT
CHAIN MODE
tCYC
tACQ
tSCLK
SDO
SDI
SCLK
CLK
DATA IN
DIGITAL HOST
CNVST
CONVERT
SDO
SDI
SCLK
CNVST
MAX11162
MAX11162
Device A
Device B
SDOA
SDOB



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