SPC584B70E5 datasheet(40/142 Pages) STMICROELECTRONICS

Part #	SPC584B70E5

Description	32-bit Power Architecture microcontroller for automotive ASIL-B applications

PDF	142 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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Electrical characteristics

SPC584Bx

40/142

DS11701 Rev 4

4.10

PLLs

Two phase-locked loop (PLL) modules are implemented to generate system and auxiliary

clocks on the device.

Figure 7 depicts the integration of the two PLLs. Refer to device Reference Manual for more

detailed schematic.

Figure 7. PLLs integration

4.10.1

PLL0

PLL1

IRCOSC

XOSC

PLL1_PHI

PLL0_PHI1

PLL0_PHI

Table 19. PLL0 electrical characteristics

Symbol

Parameter

Conditions

Value

Unit

Min

Typ

Max

fPLL0IN

— PLL0 input clock(1)

—8

—

MHz

PLL0IN

—

PLL0 input clock duty

cycle(1)

—40

—

fINFIN

—

PLL0 PFD (Phase

Frequency Detector) input

clock frequency

—8

—

MHz

fPLL0VCO

PLL0 VCO frequency

—

600

—

1400

MHz

fPLL0PHI0

D PLL0 output frequency

—

4.762

—

400

MHz

fPLL0PHI1

D PLL0 output clock PHI1

—

175(2)

MHz

tPLL0LOCK

PLL0 lock time

—

100

µs

PLL0PHI0SPJ|(3) CC

PLL0_PHI0 single period

jitter

fPLL0IN = 20 MHz

(resonator)

fPLL0PHI0 = 400 MHz,

6-sigma pk-pk

—

200

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