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MAX11284 Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX11284 Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 44 page  (VAVDD = VAVDD_A = VAVDD_B = 2.7V, VAVSS = VAVSS_A = VAVSS_B = 0V, VDVDD = VDVDD_A = VDVDD_B = 2.0V, VREFP_A = VREFP = VREFP_B = 2.5V, VREFN = VREFN_A = VREFN_B = 0V; fDATA = 1000sps, External Clock = 2.048MHz; Continuous conversion mode (SCYCLE = 0); PGA maximum output is 300mV below AVDD and minimum output is 300mV above AVSS, TA = -40°C to 85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2) Electrical Characteristics (continued) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS AIN Common-Mode Input Current Buffer ±125 nA PGA ±5 AIN Differential Mode Input Conductance GAINDIFF Bypass ±6 µA/V AIN Differential Mode Input Current Buffer ±5 nA PGA ±0.1 REF Differential Input Conductance GREFDIFF Active conversion state ±46.5 µA/V REF Input Current at Power Down IREF_PD Sleep and standby states ±2.5 µA AIN Input Capacitance CIN Buffer disabled 3 pF REF Input Capacitance CREF Buffer disabled 4.5 pF Input and REF Sampling Rate fS 1.024 MHz VREFP – VREFN Voltage Range VRABSRNG (Note 5) VAVDD V REF Voltage Range VREF 2.0 VAVDD V DIGITAL FILTER RESPONSE (Note 3) SINC FILTER Bandwidth (-3dB) BWSINC 0.203 fDATA Settling Time (Latency) 5 1/fDATA FIR FILTER Passband Ripple -0.003 +0.003 dB Passband (-0.01dB) 0.375 0.375 fDATA Bandwidth (-3dB) BWFIR 0.413 0.413 fDATA High-Pass Filter Corner fHP IIR filter; CTRL3 FILT bits = 11 0.000375 0.1 fDATA Stopband Attenuation 135 dB Stopband fSTOP 0.5 fDATA Group Delay Minimum phase filter 5 1/fDATA Linear phase filter 31 Settling Time (Latency) Minimum phase filter 10 1/fDATA Linear phase filter 62 MAX11284 Dual 24-Bit, Low-Power, High-SNR, 4ksps Delta-Sigma ADCs with Integrated PGAs www.maximintegrated.com Maxim Integrated │ 4 |
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