LTC4282 datasheet(12/24 Pages) AD

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LT4239

Rev. 0

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Parasitic MOSFET Oscillations

Not all circuit oscillations can be ascribed to the cur-

rent limit loop. Some higher frequency oscillations can

arise from the MOSFETs themselves. (See Rarely Asked

Questions—Issue 151, High-Side Current Sensing).

There are two possible parasitic oscillation mechanisms.

The first type of oscillation occurs at high frequencies,

typically above 1MHz. This high frequency oscillation is

easily damped with gate resistors R3 and R4 as shown

in Figure 1. In some applications, one may find that these

resistors help in short-circuit transient recovery as well.

However, too large of a resistor will slow down the turn-off

time. The recommended range for R3 and R4 is between

5Ω and 500Ω. 10Ω provides stability without affecting

turn-off time. These resistors must be located next to

the MOSFET gate pin with no other connections between

them. Connect each of the gate resistors to every MOSFET

when several MOSFETs are connected in parallel.

A second type of parasitic oscillation occurs at frequencies

between 200kHz and 800kHz when the MOSFET source is

loaded with less than 10µF, and the drain is fed with an

inductive impedance such as contributed by wiring induc-

tance. To prevent this second type of oscillation, load the

source with more than 10µF and bypass the input supply

with a series 10Ω, 100nF snubber to ground.

Overcurrent Fault During GATE1 Start-Up

The LT4239 features an active current limit to protect

the MOSFET M1 against short circuits or excessive cur-

rent during start-up. A rail-to-rail active current limit

(ACL) amplifier monitors the voltage across the sense

resistor RS1 which is located on the source side of the

MOSFET M1. When an overcurrent event appears, the ACL

amplifier regulates the gate of the MOSFET to maintain

50mV across the sense resistor. At this point, an internal

fault timer runs for 100µs until it times out. The MOSFET

is turned off with GATE1 pulled to OUT by 10mA, and the

fault latched-off with the FLT pin pulling low.

In the event of a severe short-circuit fault occurring during

start-up, the output current can momentarily surge to tens

of amperes. The LT4239 responds within 1µs to bring the

current under control by pulling the GATE1 to OUT. Almost

immediately, the gate of the MOSFET M1 recovers due

to the RG1 and CG1 network, and the current is actively

limited until the 100µs fault timer expires.

Overcurrent Fault After Power Good

Once the load capacitor is fully charged up through

MOSFET M1 after GATE1 start-up, MOSFET M2 will be

turned on to pass the load current in the power path.

There are three mechanisms to protect MOSFET M2 from

damage when an overcurrent event develops after power

good. The first one is the electronic circuit breaker (ECB)

with an adjustable timer. The second is the active current

limit (ACL) while the last one is a comparator detecting

the output falling below 3.7V.

An accurate electronic circuit breaker (ECB) and an active

current limit (ACL) amplifier monitor the voltage across

the sense resistor RS2 which is located on the source side

of MOSFET M2. The electronic circuit breaker will turn

off the MOSFET if the voltage across the sense resistor

exceeds the ECB threshold ∆VSENSE2(CB) (10mV) for lon-

ger than the fault filter delay configured at the CBTMR

pin. The fault filter starts the timeout with a 10µA cur-

rent charging the CBTMR pin capacitor. Otherwise, it dis-

charges with 10µA if the sense voltage falls below the ECB

threshold. If the CBTMR pin voltage exceeds its 1.232V

threshold, the MOSFET turns off with GATE2 pulled to

OUT by 50mA, and the fault is latched-off with the FLT

pin pulling low. For a given circuit breaker time delay, tCB,

the value for setting the external capacitor CFT is given by

Equation 1.

CFT = tCB • 0.008[µF⁄ms]

(1)

After the MOSFET turns off, the CBTMR pin capacitor is

discharged with a 4µA pull-down current until its threshold

reaches 0.2V. This is followed by a cool-off cycle whereby

the CBTMR pin will cycle up and down with 10µA and

4µA 512 times to allow the MOSFET to cool down. When

configured in a circuit shown in Figure 8 for auto-retry,

the resulting overcurrent duty cycle is 1:1280. During the

cool-off period, the FLT pin remains low, and the output

cannot be restarted by pulling the UV pin below 0.6V.

Active current limiting begins when the sense voltage

exceeds the ACL threshold ∆VSENSE2(ACL) (15mV), which

is 1.5 times the ECB threshold ∆VSENSE2(CB). The ACL

APPLICATIONS INFORMATION

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