PCF8545 datasheet(13/68 Pages) NXP

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NXP Semiconductors

PCF8545

Universal LCD driver for multiplex rates up to 1:8

Clock output is only valid when using the internal oscillator. The signal appears on the

OSCCLK pin.

An intermediate clock frequency is available at the OSCCLK pin. The duty cycle of this

clock varies with the chosen divide ratio.

OSC

COE

EFR

OSCCLK pin[1]

power-down

n.a.

off

n.a.

3-state[2]

power-down

n.a.

VDD

off

n.a.

3-state

internal oscillator

n.a.

9.6 kHz output[3]

9.6 kHz

9.6 kHz input

power-up

external oscillator n.a.

230 kHz

230 kHz input

Table 12. OSCCLK pin state depending on configuration

[1]

When RESET is active, the pin OSCCLK is in 3-state.

[2]

In this state, an external clock may be applied, but it is not a requirement.

[3]

9.6 kHz is the nominal frequency with q = 24, see Table 13.

External clock

In applications where an external clock must be applied to the PCF8545, bit OSC (see

Table 9) has to be set logic 1. In this case pin OSCCLK becomes an input.

The OSCCLK signal must switch between the VSS and the VDD voltage supplied to the

chip.

The EFR bit determines the external clock frequency (230 kHz or 9.6 kHz). The clock

frequency (fclk(ext)) in turn determines the LCD frame frequency, see Table 13.

Remark: If an external clock is used, then this clock signal must always be supplied to

the device when the display is on. Removing the clock may freeze the LCD in a DC state

which damages the LCD material.

7.1.4.2 Timing and frame frequency

The timing of the PCF8545 organizes the internal data flow of the device. This includes

the transfer of display data from the display RAM to the display segment outputs. The

timing also generates the LCD frame frequency which it derives as an integer division of

the clock frequency (see Table 13). The frame frequency is a fixed division of the internal

clock or of the frequency applied to pin OSCCLK when an external clock is used.

Frame frequency

Typical external

frequency (Hz)

Nominal frame

frequency (Hz)

EFR bit

Value of q[1]

9 600

200

230 000

200

Table 13. LCD frame frequencies

[1]

Other values of the frame frequency prescaler see Table 17.

PCF8545

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 4 October 2021

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