AMC23C10 datasheet(13/26 Pages) TI

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7.3.4 Power-Up and Power-Down Behavior

The open-drain output powers up in a high-impedance (Hi-Z) state when the low-side supply (VDD2) turns on.

After power-up, if the high-side is not functional yet, the output is actively pulled low. This condition happens after

the low-side start-up time plus the high-side fault detection delay time (tLS,STA + tHS,FLT), as shown in Figure 7-3.

Similarly, if the high-side supply drops below its undervoltage threshold (VDD1UV) for more than the high-side

fault detection delay time during normal operation, the open-drain output is pulled low, as shown in Figure 7-6.

This delay allows the system to shut down reliably when the high-side supply is missing.

The push-pull output (OUT2) of the AMC23C10 behaves similarly to the open-drain output (OUT1) but with

reverse polarity.

Communication starts between the high-side and low-side of the comparator is delayed by the high-side blanking

time (tHS,BLK, a time constant implemented on the high-voltage side) to avoid unintentional switching of the

comparator output during power-up.

Figure 7-3 through Figure 7-8 depict typical power-up and power-down scenarios.

In Figure 7-3, the low-side supply (VDD2) turns on but the high-side supply (VDD1) remains off. OUT1 powers

up in a Hi-Z state, and OUT2 is low. After tHS, FLT, OUT1 is driven low and OUT2 is driven high, indicating a

no-power fault on the high-side.

In Figure 7-4, the high-side supply (VDD1) turns on long after the low-side supply (VDD2) turns on. OUT1 is

initially in a low state and OUT2 is in a high state, see case (1). After the high-side supply is enabled, there is

a duration of tHS,STA + tHS, BLK before the device assumes normal operation and the outputs reflect the current

state of the comparator.

VDD1

(high-side)

tHS,FLT

VDD2

(low-side)

OUT1

(open-drain)

OUT2

(push-pull)

VDD2UV

90%

(Hi-Z)

tLS,STA

(Hi-Z)

fault

OFF

Figure 7-3. VDD2 Turns On, VDD1 Stays Off

VDD1

(high-side)

VDD2

(low-side)

VDD1UV

10%

tHS,STA+ tHS,BLK

OUT1

(open-drain)

OUT2

(push-pull)

normal

operation

normal

operation

fault

Figure 7-4. VDD2 is On; VDD1 Turns On

(Long Delay)

In Figure 7-5, the low-side supply (VDD2) turns on, followed by the high-side supply (VDD1) with only a short

delay. OUT1 is initially in a Hi-Z state, and OUT2 is low. The high-side fault detection delay (tHS,FLT) is shorter

than the high-side blanking time (tHS,BLK), and therefore OUT1 is driven low and OUT2 is driven high after

tHS,FLT, indicating that the high-side is not operational yet. After the high-side blanking time (tHS,BLK) elapses, the

device assumes normal operation and the outputs reflect the current state of the comparator.

In Figure 7-6, the high-side supply (VDD1) turns off, followed by the low-side supply (VDD2). After the high-side

fault detection delay time (tHS,FLT), OUT1 is driven low and OUT2 is driven high. As soon as VDD2 drops below

the VDD2UV threshold, OUT1 enters a Hi-Z state and OUT2 is driven low.

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AMC23C10

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