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ADE7978 Datasheet(PDF) 13 Page - Analog Devices |
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ADE7978 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 125 page  Data Sheet ADE7978/ADE7933/ADE7932/ADE7923 Rev. D | Page 13 of 125 HSDC Interface Timing Parameters VDD = 3.3 V ± 10%, GND = DGND = 0 V, XTALIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C. Table 5. Parameter Symbol Min Max Unit HSA to HSCLK Edge t SS 0 ns HSCLK Period 125 ns HSCLK Low Pulse Width t SL 50 ns HSCLK High Pulse Width t SH 50 ns Data Output Valid After HSCLK Edge t DAV 40 ns Data Output Fall Time t DF 20 ns Data Output Rise Time t DR 20 ns HSCLK Rise Time t SR 10 ns HSCLK Fall Time t SF 10 ns HSD Disable After HSA Rising Edge t DIS 5 ns HSA High After HSCLK Edge t SFS 0 ns MSB LSB INTERMEDIATE BITS tSFS tDIS tSS tSL tDF tSH tDAV tSR tSF tDR HSD HSCLK HSA Figure 8. HSDC Interface Timing 2mA IOL 800µA IOH 1.6V TO OUTPUT PIN CL 50pF Figure 9. Load Circuit for Timing Specifications |
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