MAX17232 datasheet(21/24 Pages) MAXIM

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Applications Information

Layout Recommendations

Careful PCB layout is critical to achieve low switching

losses and clean, stable operation. The switching power

stage requires particular attention (Figure 3). If possible,

mount all the power components on the top side of the

board, with their ground terminals flush against one

another. Follow these guidelines for good PCB layout:

● Keep the high-current paths short, especially at the

ground terminals. This practice is essential for stable,

jitter-free operation.

● Keep the power traces and load connections short.

This practice is essential for high efficiency. Using

thick copper PCBs (2oz vs. 1oz) can enhance full

load efficiency by 1% or more.

● Minimize current-sensing errors by connecting CS_

and OUT_. Use kelvin sensing directly across the

current-sense resistor (RSENSE_).

● Route high-speed switching nodes (BST_, LX_, DH_,

and DL_) away from sensitive analog areas (FB_,

CS_, and OUT_).

Layout Procedure

1) Place the power components first, with ground

terminals adjacent (low-side FET, CIN, COUT_, and

Schottky). If possible, make all these connections on

the top layer with wide, copper-filled areas.

2) Mount the controller IC adjacent to the low-side

MOSFET, preferably on the back side opposite NL_

and NH_ to keep LX_, GND, DH_, and the DL_ gate

drive lines short and wide. The DL_ and DH_ gate

traces must be short and wide (50 mils to 100 mils

wide if the MOSFET is 1in from the controller IC) to

keep the driver impedance low and for proper adaptive

dead-time sensing.

3) Group the gate-drive components (BST_ diode and

capacitor and LDO bypass capacitor BIAS) together

near the controller IC. Be aware that gate currents of

up to 1A flow from the bootstrap capacitor to BST_,

from DH_ to the gate of the external HS switch and

from the LX_ pin to the inductor. Up to 100mA of

current flow from the BIAS capacitor through the

bootstrap diode to the bootstrap capacitor. Dimension

those traces accordingly.

4) Make the DC-DC controller ground connections as

shown in Figure 3. This diagram can be viewed as

having two separate ground planes: power ground,

where all the high-power components go; and an

analog ground plane for sensitive analog components.

The analog ground plane and power ground plane

must meet only at a single point directly under the IC.

5) Connect the output power planes directly to the output

filter capacitor positive and negative terminals with

multiple vias. Place the entire DC-DC converter circuit

as close to the load as is practical.

Figure 3. Layout Example

INDUCTOR

COUT

INPUT

KELVIN-SENSE VIAS

UNDER THE SENSE RESISTOR

(REFER TO THE EVALUATION KIT)

GROUND

OUTPUT

LOW-SIDE

n-CHANNEL

MOSFET (NH)

HIGH-SIDE

n-CHANNEL

MOSFET (NL)

MAX17232/MAX17233

3.5V–36V, 2.2MHz, Synchronous Dual Buck

Controller with 20µA Quiescent Current

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