5

SP432DS/10

SP432 High Speed, Low Power Quad Differential Line Receiver

© Copyright 1997 Sipex Corporation

Figure 4. Tri-State Output Enable and Disable Waveforms

Figure 2. Propagation Delay

Figure 3. Test Circuit for Tri-State Outputs

AC TEST CIRCUITS AND SWITCHING TIME WAVEFORMS

OUTPUT

50%

+2.5V

0V

-2.5V

10%

10%

90%

90%

INPUTS

(V-) – (V+)

DEVICE

UNDER

TEST

S1

V+ INPUT

V- INPUT

1.3V

3.0V

GND

1.3V

OUTPUT

OUTPUT

0V

0.5V

0.5V

50%

50%

ENABLE

ENABLE

t

PHL

t

PLH