FUSB3317

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13

PDIV0, PDIV1

These pins are prepared in addition to the fuse bits to

provide a PDP range of 7.5W to 100W. FUSB3317 changes

PDP dynamically once either PDV1 or PDIV0 is changed so

the new PD message will be sent by the voltage change of

PDIVx. The table below is PDP setting logic by PDIVx.

PDIV1:PDIV0

Current_PDP of FUSB3317

11

100%*max_power_PDP

10

75%*max_power_PDP

01

50%*max_power_PDP

00

25%*max_power_PDP

VDD

VDD is 5 V regulator output, please add 2.2

mF capacitor

on the pin. Detail description and block diagram are

mentioned above.

Vconn Over current protection (Vconn OCP)

FUSB3317 will turn on VCONN whenever it needs to

read the eMarker in the cable only if 5 A capability is

supported by trim option. When VCONN is sourced, per

USB PD specification only 100 mW maximum (5 V with

20 mA for the FUSB3317) needs to be supplied for a USB

2.0 source application. If the VCONN current exceeds

ICONN_OCP (typical 50 mA) for tVCONN_OCP then the

FUSB3317 will disable the VCONN supply and abort the

eMarker discovery process. The default maximum current

of 3 A will be used for all source capabilities for USB PD

messages in the latter case and the normal PD messaging

will occurs without interruption. No Alert messages will be

sent but the PD Status message will have a bit to indicate that

the cable limited the FUSB3317 from advertising 5 A source

capabilities.

CC1 and CC2 Over Voltage Protection (CC_OVP)

FUSB3317 protects against the CC1 and CC2 connector

pins being shorted to VBUS up to 27 V and it has the ability

to start protecting the system when the CC voltage is beyond

it normal operating range. If either CC1 or CC2 voltage is

FUSB3317 protects the system by triggering this fault and

executing protection as described in Protection Operation

section above.

D+/D− Lines Over Voltage Protection

In order to protect the FUSB3317 when D+ or D− are

short−circuited with small impedance to VBUS, OVP is

incorporated on D+ and D− pin. If voltage on D+ and/or D−

Protection is triggered. D+/D− OVP is always enabled in

default. D+ and D− lines have absolute voltage up to 27 V

so that any short to VBUS when VBUS is at its OVP limit

will not destroy the D+ and D− pins since it takes a finite

amount of time after recognizing an OVP on VBUS or

D+/D− before the DC/DC controller is shut off and VBUS

capacitance is discharged.

DISC

DISC pin connects to VBUS path between NFET source

pin and VBUS pin of USB−C connector through about 40

W

series resistor to discharge VBUS capacitor when VBUS

changes from high to low, like 15 V to 5 V. The force

discharge can make the VBUS transition fast enough to meet

the USB PD spec even with large bulk capacitor. DISC

discharge only occurs when VBUS load current is less than

about 250 mA, if the load current is larger than that, the

DISC discharge doesn’t occur. DISC discharge also occurs

at fault conditions such as, OVP, UVP, OCP and OTP on

VBUS or CCx OVP or DP/DM OVP conditions.