SMM465 datasheet(18/30 Pages) SUMMIT

18 / 30 page

SMM465

Preliminary Information

Summit Microelectronics, Inc

2085 1.1 05/27/04

RESTART OF POWER-ON CASCADE SEQUEN-

CING

Once a Force Shutdown or Power-off operation has

completed, the SMM465 can restart the Power-on

cascade sequencing. The device can be programmed

to automatically restart after a Force Shutdown

provided the PWR_ON/OFF pin remains in the active

state or the I

2C Power-on command remains in the

command register. If this option is not selected, the

SMM465 requires toggling of the PWR_ON/OFF pin or

toggling of the I

2C commands by issuing a Power-off

command and then reissuing the Power-on command

in order to restart Power-on sequencing.

In either case, assertion of the FS pin will prevent the

SMM465 from restarting Power-on sequencing.

addition, the device can be programmed to check that

VDD and the 12VIN are within their programmed

voltage

thresholds

before

restarting

Power-on

sequencing.

In cases where brownout conditions (Figure 10) or

loss of power are used to cause a sequence off of the

supplies or a Force Shutdown, it is best to toggle the

PWR_ON/OFF pin or use the I

2C Power commands

after the brownout condition is over or if the supplies

do not fully discharge before initiating a Power-on

sequence.

Recommended Use of the PWR_ON/OFF pin:

The PWR_ON/OFF pin is edge-triggered to lock out

false or nuisance signals during both the power-on

and power-off sequences. If during a system power-

down, whether deliberate or due to a failed power

system, the VDD_CAP voltage falls below 2.5V, the

SMM465 internal UVLO (UnderVoltage LockOut)

circuit resets all internal logic. Once power has

recovered above 2.6V the SMM465 will restart

assuming the PWR_ON/OFF pin is in the asserted

state or an I

2C power command is issued. The

SMM465 can be used with the PWR_ON/OFF pin

either toggled by a logic level, controlled by a software

command or tied either high or low as described in the

data sheet.

VDD_CAP

2.5V

3.6V, 5.5V

UVLO

(Internal)

2.6V

Figure 10 - Timing Sequence recovering from a VDD_CAP Power ‘Brown-Out’

APPLICATIONS INFORMATION (CONTINUED)

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