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BLF888E Datasheet(PDF) 2 Page - Ampleon Netherlands B.V. |
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BLF888E Datasheet(HTML) 2 Page - Ampleon Netherlands B.V. |
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2 / 13 page ![]() BLF888E_BLF888ES All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2016. All rights reserved. Product data sheet Rev. 2 — 30 August 2016 2 of 13 BLF888E; BLF888ES UHF power LDMOS transistor 2. Pinning information [1] Connected to flange. 3. Ordering information 4. Limiting values [1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF calculator. Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF888E (SOT539A) 1 drain1 (peak) 2 drain2 (main) 3 gate1 (peak) 4 gate2 (main) 5source [1] BLF888ES (SOT539B) 1 drain1 (peak) 2 drain2 (main) 3 gate1 (peak) 4 gate2 (main) 5source [1] 5 12 4 3 4 3 5 1 2 sym117 5 12 4 3 4 3 5 1 2 sym117 Table 3. Ordering information Type number Package Name Description Version BLF888E - flanged balanced ceramic package; 2 mounting holes; 4 leads SOT539A BLF888ES - earless flanged balanced ceramic package; 4 leads SOT539B Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS(amp)main main amplifier drain-source voltage - 104 V VDS(amp)peak peak amplifier drain-source voltage - 120 V VGS(amp)main main amplifier gate-source voltage 0.5 +11 V VGS(amp)peak peak amplifier gate-source voltage 6+11 V Tstg storage temperature 65 +150 C Tj junction temperature [1] -225 C |
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