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DP8307A Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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DP8307A Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 6 page ![]() DC Electrical Characteristics (Notes 2 and 3) (Continued) Symbol Parameter Conditions Min Typ Max Units CONTROL INPUTS T R VIH Logical ‘‘1’’ Input Voltage 20 V VIL Logical ‘‘0’’ Input Voltage 07 V IIH Logical ‘‘1’’ Input Current VIH e 27V 05 20 m A II Maximum Input Current VCC e Max VIH e 525V 10 mA IIL Logical ‘‘0’’ Input Current VIL e 04V R b 01 b 025 mA T b 025 b 05 mA VCLAMP Input Clamp Voltage IIN eb12 mA b 08 b 15 V POWER SUPPLY CURRENT ICC Power Supply Current T e R e 20V VIN e 20V VCC e Max 70 100 mA T e 04V VINA e R e 2V VCC e Max 100 150 mA AC Electrical Characteristics VCC e 5V TA e 25 C Symbol Parameter Conditions Min Typ Max Units A PORT DATAMODE SPECIFICATIONS tPDHLA Propagation Delay to a Logical ‘‘0’’ from T e 24V R e 04V (Figure A) 812 ns B Port to A Port R1 e 1k R2 e 5k C1 e 30 pF tPDLHA Propagation Delay to a Logical ‘‘1’’ from T e 24V R e 04V (Figure A) 11 16 ns B Port to A Port R1 e 1k R2 e 5k C1 e 30 pF tPLZA Propagation Delay from a Logical ‘‘0’’ to B0 to B7 e 24V T e 24V (Figure B) 10 15 ns TRI-STATE from R to A Port S3 e 1 R5 e 1k C4 e 15 pF tPHZA Propagation Delay from a Logical ‘‘1’’ to B0 to B7 e 04V T e 24V (Figure B) 815 ns TRI-STATE from R to A Port S3 e 0 R5 e 1k C4 e 15 pF tPZLA Propagation Delay from TRI-STATE to B0 to B7 e 24V T e 24V (Figure B) 25 35 ns a Logical ‘‘0’’ from R to A Port S3 e 1 R5 e 1k C4 e 30 pF tPZHA Propagation Delay from TRI-STATE to B0 to B7 e 04V T e 24V (Figure B) 24 35 ns a Logical ‘‘1’’ from R to A Port S3 e 0 R5 e 5k C4 e 30 pF B PORT DATAMODE SPECIFICATIONS tPDHLB Propagation Delay to a Logical ‘‘0’’ from T e 04V R e 24V (Figure A) A Port to B Port R1 e 100X R2 e 1k C1 e 300 pF 12 18 ns R1 e 667X R2 e 5k C1 e 45 pF 8 12 ns tPDLHB Propagation Delay to a Logical ‘‘1’’ from T e 04V R e 24V (Figure A) A Port to B Port R1 e 100X R2 e 1k C1 e 300 pF 15 23 ns R1 e 667X R2 e 5k C1 e 45 pF 9 14 ns tPLZB Propagation Delay from a Logical ‘‘0’’ to A0 to A7 e 24V R e 24V (Figure B) 13 18 ns TRI-STATE from T to B Port S3 e 1 R5 e 1k C4 e 15 pF tPHZB Propagation Delay from a Logical ‘‘1’’ to A0 to A7 e 04V R e 24V (Figure B) 815 ns TRI-STATE from T to B Port S3 e 0 R5 e 1k C4 e 15 pF tPZLB Propagation Delay from TRI-STATE to A0 to A7 e 24V R e 24V (Figure B) a Logical ‘‘0’’ from T to B Port S3 e 1 R5 e 100X C4 e 300 pF 32 40 ns S3 e 1 R5 e 667X C4 e 45 pF 18 25 ns tPZHB Propagation Delay from TRI-STATE to A0 to A7 e 04V R e 24V ( Figure B ) a Logical ‘‘1’’ from T to B Port S3 e 0 R5 e 1k C4 e 300 pF 25 35 ns S3 e 0 R5 e 5k C4 e 45 pF 16 25 ns Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices should be operated at these limits The tables of ‘‘Electrical Characteristics’’ provide conditions for actual device operation Note 2 Unless otherwise specified minmax limits apply across the supply and temperature range listed in the table of Recommended Operating Conditions All typical values given are for VCC e 5V and TA e 25 C Note 3 All currents into device pins are positive all currents out of device pins are negative All voltages are referenced to ground unless otherwise specified Note 4 Only one output at a time should be shorted http www nationalcom 3 |
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