PCA9506 datasheet(22/30 Pages) PHILIPS

22 / 30 page

9397 750 14939

Product data sheet

Rev. 01 — 14 February 2006

22 of 30

Philips Semiconductors

PCA9506

40-bit I2C-bus I/O port with RESET, OE, and INT

[5]

The maximum tf for the SDA and SCL bus lines is speciﬁed at 300 ns. The maximum fall time for the SDA output stage tf is speciﬁed at

250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without

exceeding the maximum speciﬁed tf.

[6]

Cb = total capacitance of one bus line in pF.

[7]

Input ﬁlters on the SDA and SCL inputs suppress noise spikes less than 50 ns.

Fig 16. Deﬁnition of timing on the I2C-bus

tSP

tBUF

tHD;STA

tLOW

tHD;DAT

tHIGH

tSU;DAT

tSU;STA

tHD;STA

tSU;STO

SDA

SCL

002aaa986

Rise and fall times refer to VIL and VIH.

Fig 17. I2C-bus timing diagram

SCL

SDA

tHD;STA

tSU;DAT

tHD;DAT

tBUF

tSU;STA

tLOW

tHIGH

tVD;ACK

002aab175

tSU;STO

protocol

START

condition

(S)

bit 7

MSB

(A7)

bit 6

(A6)

bit 0

(R/W)

acknowledge

(A)

STOP

condition

(P)

1/fSCL

tVD;DAT

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