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MIC4425 Datasheet(PDF) 10 Page - Microchip Technology

Part # MIC4425
Description  Dual 3A Peak Low-Side MOSFET Drivers
PDF  26 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MIC4425 Datasheet(HTML) 10 Page - Microchip Technology

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MIC4423/4/5
DS20006638A-page 10
2022 Microchip Technology Inc. and its subsidiaries
4.0
APPLICATION INFORMATION
Although the MIC4423/4/5 drivers have been
specifically constructed to operate reliably under any
practical circumstances. There are, nonetheless,
details of usage that will provide better operation of the
device.
4.1
Supply Bypassing
Charging and discharging large capacitive loads
quickly requires large currents. For example, charging
2000 pF from 0 to 15 volts in 20 ns requires a constant
current of 1.5A. In practice, the charging current is not
constant, and will usually peak at around 3A. In order
to charge the capacitor, the driver must be capable of
drawing this much current, this quickly, from the system
power supply. In turn, this means that as far as the
driver is concerned, the system power supply, as seen
by the driver, must have a very low impedance.
As a practical matter, this means that the power supply
bus must be capacitively bypassed at the driver with at
least 100X the load capacitance in order to achieve
optimum driving speed. It also implies that the
bypassing capacitor must have very low internal
inductance and resistance at all frequencies of interest.
Generally, this means using two capacitors, one a
high-performance low ESR film, the other a low internal
resistance ceramic, as together the valleys in their two
impedance curves allow adequate performance over a
broad enough band to get the job done. Many film
capacitors can be sufficiently inductive as to be useless
for this service. Likewise, many multilayer ceramic
capacitors have unacceptably high internal resistance.
Use capacitors intended for high pulse current service.
The high pulse current demands of capacitive drivers
also mean that the bypass capacitors must be mounted
very close to the driver in order to prevent the effects of
lead inductance or PCB land inductance from nullifying
what you are trying to accomplish. For optimum results
the sum of the lengths of the leads and the lands from
the capacitor body to the driver body should total
2.5 cm or less.
Bypass capacitance, and its close mounting to the
driver serves two purposes. Not only does it allow
optimum performance from the driver, it minimizes the
amount of lead length radiating at high frequency
during switching, (due to the large ΔI) thus minimizing
the amount of EMI later available for system disruption
and subsequent cleanup. It should also be noted that
the actual frequency of the EMI produced by a driver is
not the clock frequency at which it is driven, but is
related to the highest rate of change of current
produced during switching, a frequency generally one
or two orders of magnitude higher, and thus more
difficult to filter if you let it permeate your system.
Good
bypassing practice is essential for proper
operation of high speed driver ICs.
4.2
Grounding
Both proper bypassing and proper grounding are
necessary for optimum driver operation. Bypassing
capacitance only allows a driver to turn the load ON.
Eventually (except in rare circumstances) it is also
necessary to turn the load OFF. This requires attention
to the ground path. Two things other than the driver
affect the rate at which it is possible to turn a load off:
The adequacy of the grounding available for the driver,
and the inductance of the leads from the driver to the
load. The latter will be discussed in a separate section.
Best practice for a ground path is obviously a well laid
out ground plane. However, this is not always practical,
and a poorly-laid out ground plane can be worse than
none.Attention to the paths taken by return currents
even in a ground plane is essential. In general, the
leads from the driver to its load, the driver to the power
supply, and the driver to whatever is driving it should all
be as low in resistance and inductance as possible. Of
the three paths, the ground lead from the driver to the
logic driving it is most sensitive to resistance or
inductance, and ground current from the load are what
is most likely to cause disruption. Thus, these ground
paths should be arranged so that they never share a
land, or do so for as short a distance as is practical.
To illustrate what can happen, consider the following:
The inductance of a 2 cm long land, 1.59 mm (0.062")
wide on a PCB with no ground plane is approximately
45 nH. Assuming a dl/dt of 0.3 A/ns (which will allow a
current of 3A to flow after 10 ns, and is thus slightly
slow for our purposes) a voltage of 13.5 volts will
develop along this land in response to our postulated
ΔI. For a 1 cm land, (approximately 15 nH) 4.5 volts is
developed. Either way, anyone using TTL level input
signals to the driver will find that the response of their
driver has been seriously degraded by a common
ground path for input to and output from the driver of
the given dimensions. Note that this is before
accounting for any resistive drops in the circuit. The
resistive drop in a 1.59 mm (0.062") land of 2 oz.
Copper carrying 3A will be about 4 mV/cm (10 mV/in)
at DC, and the resistance will increase with frequency
as skin effect comes into play.
The problem is most obvious in inverting drivers where
the input and output currents are in phase so that any
attempt to raise the driver’s input voltage (in order to
turn the driver’s load off) is countered by the voltage
developed on the common ground path as the driver
attempts to do what it was supposed to. It takes very
little common ground path, under these circumstances,
to alter circuit operation drastically.



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